mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
874a720286
update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
76 lines
2.5 KiB
C
76 lines
2.5 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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// The LL layer for ESP32 SIGMADELTA register operations
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#pragma once
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#include <stdbool.h>
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#include "hal/misc.h"
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#include "soc/sigmadelta_periph.h"
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#include "soc/gpio_sd_struct.h"
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#include "hal/sigmadelta_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Get SIGMADELTA hardware instance with giving sigmadelta num
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#define SIGMADELTA_LL_GET_HW(num) (((num) == 0) ? (&SIGMADELTA) : NULL)
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/**
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* @brief Set Sigma-delta enable
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*
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* @param hw Peripheral SIGMADELTA hardware instance address.
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* @param en Sigma-delta enable value
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*/
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static inline void sigmadelta_ll_set_en(gpio_sd_dev_t *hw, bool en)
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{
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// The clk enable register does not exist on ESP32.
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}
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/**
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* @brief Set Sigma-delta channel duty.
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*
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* @param hw Peripheral SIGMADELTA hardware instance address.
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* @param channel Sigma-delta channel number
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* @param duty Sigma-delta duty of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
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* The waveform is more like a random one in this range.
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*/
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static inline void sigmadelta_ll_set_duty(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, int8_t duty)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], duty, (uint32_t)duty);
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}
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/**
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* @brief Set Sigma-delta channel's clock pre-scale value.
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*
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* @param hw Peripheral SIGMADELTA hardware instance address.
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* @param channel Sigma-delta channel number
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* @param val The divider of source clock, ranges from 0 to 255
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*/
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static inline void sigmadelta_ll_set_prescale(gpio_sd_dev_t *hw, sigmadelta_channel_t channel, uint8_t prescale)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], prescale, prescale);
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}
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#ifdef __cplusplus
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}
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#endif
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