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39 lines
1.4 KiB
C
39 lines
1.4 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define APLL_MIN_FREQ (250000000)
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#define APLL_MAX_FREQ (500000000)
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#define APLL_I2S_MIN_RATE (10675) //in Hz, I2S Clock rate limited by hardware
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#define I2S_AD_BCK_FACTOR (2)
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#define I2S_PDM_BCK_FACTOR (64)
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#define I2S_MAX_BUFFER_SIZE (4 * 1024 * 1024) //the maximum RAM can be allocated
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#define I2S_BASE_CLK (2*APB_CLK_FREQ)
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// ESP32 have 2 I2S
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#define I2S_NUM_0 (0) /*!< I2S port 0 */
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#define I2S_NUM_1 (1) /*!< I2S port 1 */
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#define I2S_NUM_MAX (2) /*!< I2S port max */
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#define SOC_I2S_NUM (I2S_NUM_MAX)
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#define SOC_I2S_SUPPORT_PDM (1) //ESP32 support PDM
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#ifdef __cplusplus
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}
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#endif
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