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esp-idf/components/ulp/ulp_riscv
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Sudeep Mohanty a67d15fdea ulp: Added APIs to handle ULP signal ISRs for the main CPU 
This commit introduces APIs to handle ULP signal ISRs when the main core
is not in sleepmode.

Closes https://github.com/espressif/esp-idf/issues/10737
2023-02-24 07:25:39 +00:00
..
include ulp: Added APIs to handle ULP signal ISRs for the main CPU 2023-02-24 07:25:39 +00:00
shared/include ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP. 2022-08-05 18:16:31 +08:00
ulp_core ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 2022-12-27 07:44:26 +00:00
ulp_riscv_i2c.c ulp risc-v rtc i2c: Fix a bug where RTC I2C failed to initialize after esp_restart() 2023-01-02 15:44:03 +01:00
ulp_riscv_lock.c ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP. 2022-08-05 18:16:31 +08:00
ulp_riscv.c ulp: Added APIs to handle ULP signal ISRs for the main CPU 2023-02-24 07:25:39 +00:00