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https://github.com/espressif/esp-idf.git
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555 lines
20 KiB
C
555 lines
20 KiB
C
#include "test/test_common_spi.h"
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#include "driver/spi_master.h"
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#include "driver/spi_slave.h"
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#include "esp_log.h"
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#include "soc/spi_periph.h"
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#include "test/test_common_spi.h"
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/********************************************************************************
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* Test By Master & Slave (2 boards)
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*
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* Wiring:
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* | Master | Slave |
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* | ------ | ----- |
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* | 12 | 19 |
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* | 13 | 23 |
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* | 14 | 18 |
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* | 15 | 5 |
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* | GND | GND |
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*
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********************************************************************************/
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static void test_master_init(void** context);
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static void test_master_deinit(void* context);
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static void test_master_loop(const void *test_cfg, void* context);
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static const ptest_func_t master_test_func = {
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.pre_test = test_master_init,
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.post_test = test_master_deinit,
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.loop = test_master_loop,
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.def_param = spitest_def_param,
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};
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static void test_slave_init(void** context);
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static void test_slave_deinit(void* context);
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static void test_slave_loop(const void *test_cfg, void* context);
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static const ptest_func_t slave_test_func = {
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.pre_test = test_slave_init,
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.post_test = test_slave_deinit,
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.loop = test_slave_loop,
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.def_param = spitest_def_param,
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};
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#define TEST_SPI_MASTER_SLAVE(name, param_group, extra_tag) \
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PARAM_GROUP_DECLARE(name, param_group) \
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TEST_MASTER_SLAVE(name, param_group, "[spi_ms][test_env=Example_SPI_Multi_device][timeout=120]"#extra_tag, &master_test_func, &slave_test_func)
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/************ Master Code ***********************************************/
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static void test_master_init(void** arg)
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{
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TEST_ASSERT(*arg==NULL);
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*arg = malloc(sizeof(spitest_context_t));
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spitest_context_t* context = *arg;
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TEST_ASSERT(context!=NULL);
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context->slave_context = (spi_slave_task_context_t){};
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esp_err_t err = init_slave_context(&context->slave_context);
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TEST_ASSERT(err == ESP_OK);
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}
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static void test_master_deinit(void* arg)
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{
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spitest_context_t* context = (spitest_context_t*)arg;
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deinit_slave_context(&context->slave_context);
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}
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static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
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{
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//master config
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spi_bus_config_t buspset=SPI_BUS_TEST_DEFAULT_CONFIG();
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buspset.miso_io_num = spi_periph_signal[HSPI_HOST].spiq_iomux_pin;
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buspset.mosi_io_num = spi_periph_signal[HSPI_HOST].spid_iomux_pin;
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buspset.sclk_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin;
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//this does nothing, but avoid the driver from using native pins
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if (!pset->master_iomux) buspset.quadhd_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin;
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spi_device_interface_config_t devpset=SPI_DEVICE_TEST_DEFAULT_CONFIG();
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devpset.spics_io_num = spi_periph_signal[HSPI_HOST].spics0_iomux_pin;
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devpset.mode = pset->mode;
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const int cs_pretrans_max = 15;
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if (pset->dup==HALF_DUPLEX_MISO) {
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devpset.cs_ena_pretrans = cs_pretrans_max;
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devpset.flags |= SPI_DEVICE_HALFDUPLEX;
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} else if (pset->dup == HALF_DUPLEX_MOSI) {
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devpset.cs_ena_pretrans = cs_pretrans_max;
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devpset.flags |= SPI_DEVICE_NO_DUMMY;
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} else {
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devpset.cs_ena_pretrans = cs_pretrans_max;//20;
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}
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const int cs_posttrans_max = 15;
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devpset.cs_ena_posttrans = cs_posttrans_max;
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devpset.input_delay_ns = pset->slave_tv_ns;
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devpset.clock_speed_hz = freq;
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if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY;
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TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, pset->master_dma_chan));
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TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devpset, spi));
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//prepare data for the slave
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for (int i = 0; i < pset->test_size; i ++) {
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/* in the single board, the data is send to the slave task, then to the driver.
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* However, in this test we don't know the data received by the slave.
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* So we send to the return queue of the slave directly.
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*/
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//xQueueSend( slave_context.data_to_send, &slave_txdata[i], portMAX_DELAY );
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uint8_t slave_buffer[320+8];
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int length;
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if (pset->dup!=HALF_DUPLEX_MISO) {
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length = context->master_trans[i].length;
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} else {
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length = context->master_trans[i].rxlength;
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}
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uint32_t* ptr = (uint32_t*)slave_buffer;
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ptr[0] = length;
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ptr[1] = (uint32_t)context->slave_trans[i].start;
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if (context->master_trans[i].tx_buffer!=NULL) {
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memcpy(ptr+2, context->master_trans[i].tx_buffer, (context->master_trans[i].length+7)/8);
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}
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//Send to return queue directly
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xRingbufferSend(context->slave_context.data_received, slave_buffer, 8+(length+7)/8, portMAX_DELAY);
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}
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memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
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}
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static void test_master_loop(const void *arg1, void* arg2)
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{
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const spitest_param_set_t *test_cfg = (spitest_param_set_t*)arg1;
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spitest_context_t* context = (spitest_context_t*)arg2;
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spi_device_handle_t spi;
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spitest_init_transactions(test_cfg, context);
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const int *timing_speed_array = test_cfg->freq_list;
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ESP_LOGI(MASTER_TAG, "****************** %s ***************", test_cfg->pset_name);
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for (int i=0; ; i++ ) {
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const int freq = timing_speed_array[i];
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if (freq==0) break;
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if (test_cfg->freq_limit && freq > test_cfg->freq_limit) break;
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ESP_LOGI(MASTER_TAG, "==============> %dk", freq/1000);
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test_master_start(&spi, freq, test_cfg, context);
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unity_wait_for_signal("slave ready");
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for( int j= 0; j < test_cfg->test_size; j ++ ) {
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//wait for both master and slave end
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ESP_LOGI( MASTER_TAG, "=> test%d", j );
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//send master tx data
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vTaskDelay(20);
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spi_transaction_t *t = &context->master_trans[j];
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TEST_ESP_OK (spi_device_transmit(spi, t) );
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int len = get_trans_len(test_cfg->dup, t);
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spitest_master_print_data(t, len);
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size_t rcv_len;
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slave_rxdata_t *rcv_data = xRingbufferReceive( context->slave_context.data_received, &rcv_len, portMAX_DELAY );
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spitest_slave_print_data(rcv_data, false);
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//check result
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bool check_master_data = (test_cfg->dup != HALF_DUPLEX_MOSI &&
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(test_cfg->master_limit == 0 || freq <= test_cfg->master_limit));
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const bool check_slave_data = false;
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const bool check_len = false;
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if (!check_master_data) {
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ESP_LOGI(MASTER_TAG, "skip data check due to duplex mode or freq.");
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} else {
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TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data,
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check_len, check_slave_data));
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}
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//clean
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vRingbufferReturnItem( context->slave_context.data_received, rcv_data );
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}
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master_free_device_bus(spi);
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}
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}
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/************ Slave Code ***********************************************/
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static void test_slave_init(void** arg)
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{
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TEST_ASSERT(*arg==NULL);
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*arg = malloc(sizeof(spitest_context_t));
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spitest_context_t* context = (spitest_context_t*)*arg;
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TEST_ASSERT(context!=NULL);
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context->slave_context = (spi_slave_task_context_t){};
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esp_err_t err = init_slave_context( &context->slave_context );
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TEST_ASSERT( err == ESP_OK );
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xTaskCreate( spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
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}
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static void test_slave_deinit(void* arg)
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{
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spitest_context_t* context = (spitest_context_t*)arg;
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vTaskDelete( context->handle_slave );
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context->handle_slave = 0;
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deinit_slave_context(&context->slave_context);
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}
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static void timing_slave_start(int speed, const spitest_param_set_t* pset, spitest_context_t *context)
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{
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//slave config
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spi_bus_config_t slv_buscfg=SPI_BUS_TEST_DEFAULT_CONFIG();
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slv_buscfg.miso_io_num = spi_periph_signal[VSPI_HOST].spiq_iomux_pin;
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slv_buscfg.mosi_io_num = spi_periph_signal[VSPI_HOST].spid_iomux_pin;
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slv_buscfg.sclk_io_num = spi_periph_signal[VSPI_HOST].spiclk_iomux_pin;
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//this does nothing, but avoid the driver from using native pins
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if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = spi_periph_signal[HSPI_HOST].spiclk_iomux_pin;
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spi_slave_interface_config_t slvcfg=SPI_SLAVE_TEST_DEFAULT_CONFIG();
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slvcfg.spics_io_num = spi_periph_signal[VSPI_HOST].spics0_iomux_pin;
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slvcfg.mode = pset->mode;
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//Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
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slave_pull_up(&slv_buscfg, slvcfg.spics_io_num);
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TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &slv_buscfg, &slvcfg, pset->slave_dma_chan));
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//prepare data for the master
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for (int i = 0; i < pset->test_size; i++) {
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if (pset->dup==FULL_DUPLEX) {
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memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].length+7)/8);
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} else if (pset->dup==HALF_DUPLEX_MISO) {
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memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].rxlength+7)/8);
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}
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}
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}
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static void test_slave_loop(const void *arg1, void* arg2)
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{
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const spitest_param_set_t *pset = (spitest_param_set_t*)arg1;
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spitest_context_t* context = (spitest_context_t*)arg2;
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ESP_LOGI(SLAVE_TAG, "****************** %s ***************", pset->pset_name);
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spitest_init_transactions(pset, context);
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const int *timing_speed_array = pset->freq_list;
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for (int i=0; ; i++ ) {
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const int freq = timing_speed_array[i];
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if (freq==0) break;
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if (pset->freq_limit != 0 && freq > pset->freq_limit) break;
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ESP_LOGI(MASTER_TAG, "==============> %dk", timing_speed_array[i]/1000);
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//Initialize SPI slave interface
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timing_slave_start(freq, pset, context);
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//prepare slave tx data
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for (int i = 0; i < pset->test_size; i ++) {
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xQueueSend( context->slave_context.data_to_send, &context->slave_trans[i], portMAX_DELAY );
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//memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].length+7)/8);
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}
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vTaskDelay(50/portTICK_PERIOD_MS);
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unity_send_signal("slave ready");
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for( int i= 0; i < pset->test_size; i ++ ) {
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//wait for both master and slave end
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ESP_LOGI( MASTER_TAG, "===== test%d =====", i );
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//send master tx data
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vTaskDelay(20);
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spi_transaction_t *t = &context->master_trans[i];
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int len = get_trans_len(pset->dup, t);
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spitest_master_print_data(t, FULL_DUPLEX);
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size_t rcv_len;
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slave_rxdata_t *rcv_data = xRingbufferReceive( context->slave_context.data_received, &rcv_len, portMAX_DELAY );
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spitest_slave_print_data(rcv_data, true);
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//check result
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const bool check_master_data = false;
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bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
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const bool check_len = true;
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TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data, check_len, check_slave_data));
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//clean
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vRingbufferReturnItem( context->slave_context.data_received, rcv_data );
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}
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TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
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}
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}
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/************ Timing Test ***********************************************/
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static spitest_param_set_t timing_conf[] = {
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{ .pset_name = "FULL_DUP, BOTH IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.master_limit = SPI_MASTER_FREQ_16M,
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.dup = FULL_DUPLEX,
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.master_iomux= true,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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},
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{ .pset_name = "FULL_DUP, MASTER IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.master_limit = SPI_MASTER_FREQ_11M,
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.dup = FULL_DUPLEX,
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.master_iomux = true,
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.slave_iomux = false,
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.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
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},
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{ .pset_name = "FULL_DUP, SLAVE IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.master_limit = SPI_MASTER_FREQ_11M,
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.dup = FULL_DUPLEX,
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.master_iomux = false,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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},
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{ .pset_name = "FULL_DUP, BOTH GPIO",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.master_limit = SPI_MASTER_FREQ_9M,
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.dup = FULL_DUPLEX,
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.master_iomux = false,
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.slave_iomux = false,
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.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
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},
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{ .pset_name = "MOSI_DUP, BOTH IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MOSI,
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.master_iomux= true,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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},
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{ .pset_name = "MOSI_DUP, MASTER IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MOSI,
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.master_iomux= true,
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.slave_iomux = false,
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.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
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},
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{ .pset_name = "MOSI_DUP, SLAVE IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MOSI,
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.master_iomux= false,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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},
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{ .pset_name = "MOSI_DUP, BOTH GPIO",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MOSI,
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.master_iomux= false,
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.slave_iomux = false,
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.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
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},
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{ .pset_name = "MISO_DUP, BOTH IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MISO,
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.master_iomux = true,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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},
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{ .pset_name = "MISO_DUP, MASTER IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MISO,
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.master_iomux = true,
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.slave_iomux = false,
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.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
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},
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{ .pset_name = "MISO_DUP, SLAVE IOMUX",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MISO,
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.master_iomux = false,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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},
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{ .pset_name = "MISO_DUP, BOTH GPIO",
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.freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
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.dup = HALF_DUPLEX_MISO,
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.master_iomux = false,
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.slave_iomux = false,
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.slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
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},
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};
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TEST_SPI_MASTER_SLAVE(TIMING, timing_conf, "")
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/************ Mode Test ***********************************************/
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#define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
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//Set to this input delay so that the master will read with delay until 7M
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#define DELAY_HCLK_UNTIL_7M 12.5*3
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static int test_freq_mode_ms[]={
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100*1000,
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6*1000*1000,
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7*1000*1000,
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SPI_MASTER_FREQ_8M, //maximum freq MISO stable before next latch edge
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SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
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SPI_MASTER_FREQ_10M,
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SPI_MASTER_FREQ_11M,
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SPI_MASTER_FREQ_13M,
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SPI_MASTER_FREQ_16M,
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SPI_MASTER_FREQ_20M,
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0,
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};
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static int test_freq_20M_only[]={
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SPI_MASTER_FREQ_20M,
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0,
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};
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spitest_param_set_t mode_conf[] = {
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//non-DMA tests
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{ .pset_name = "mode 0, no DMA",
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.freq_list = test_freq_mode_ms,
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.master_limit = FREQ_LIMIT_MODE,
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.dup = FULL_DUPLEX,
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.master_iomux= true,
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.slave_iomux = true,
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.slave_tv_ns = TV_WITH_ESP_SLAVE,
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.mode = 0,
|
|
},
|
|
{ .pset_name = "mode 1, no DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 1,
|
|
},
|
|
{ .pset_name = "mode 2, no DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 2,
|
|
},
|
|
{ .pset_name = "mode 3, no DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 3,
|
|
},
|
|
//the master can only read to 16MHz, use half-duplex mode to read at 20.
|
|
{ .pset_name = "mode 0, no DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 0,
|
|
},
|
|
{ .pset_name = "mode 1, no DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 1,
|
|
},
|
|
{ .pset_name = "mode 2, no DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 2,
|
|
},
|
|
{ .pset_name = "mode 3, no DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 3,
|
|
},
|
|
//DMA tests
|
|
{ .pset_name = "mode 0, DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = DELAY_HCLK_UNTIL_7M,
|
|
.mode = 0,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
.length_aligned = true,
|
|
},
|
|
{ .pset_name = "mode 1, DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 1,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
.length_aligned = true,
|
|
},
|
|
{ .pset_name = "mode 2, DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = DELAY_HCLK_UNTIL_7M,
|
|
.mode = 2,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
.length_aligned = true,
|
|
},
|
|
{ .pset_name = "mode 3, DMA",
|
|
.freq_list = test_freq_mode_ms,
|
|
.master_limit = FREQ_LIMIT_MODE,
|
|
.dup = FULL_DUPLEX,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 3,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
.length_aligned = true,
|
|
},
|
|
//the master can only read to 16MHz, use half-duplex mode to read at 20.
|
|
{ .pset_name = "mode 0, DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 0,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
},
|
|
{ .pset_name = "mode 1, DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 1,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
},
|
|
{ .pset_name = "mode 2, DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 2,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
},
|
|
{ .pset_name = "mode 3, DMA, 20M",
|
|
.freq_list = test_freq_20M_only,
|
|
.dup = HALF_DUPLEX_MISO,
|
|
.master_iomux= true,
|
|
.slave_iomux = true,
|
|
.slave_tv_ns = TV_WITH_ESP_SLAVE,
|
|
.mode = 3,
|
|
.master_dma_chan = 1,
|
|
.slave_dma_chan = 1,
|
|
},
|
|
};
|
|
TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "[ignore]") |