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118 lines
3.8 KiB
C
118 lines
3.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "sdkconfig.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef CONFIG_ESP_IPC_ISR_ENABLE
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/** @cond */
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typedef void (*esp_ipc_isr_func_t)(void* arg);
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/** @endcond */
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/**
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* @brief Initialize inter-processor call module which based on #4 high-interrupt.
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*
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* This function is called on CPU start and should not be called from the application.
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*
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* This function starts two tasks, one on each CPU. These tasks register
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* #4 High-interrupt and after that, the tasks are deleted.
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* The next API functions work with this functionality:
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* esp_ipc_isr_asm_call
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* esp_ipc_isr_asm_call_blocking
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* They allow to run an asm function on other CPU.
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*/
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void esp_ipc_isr_init(void);
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/**
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* @brief Execute an asm function on the other CPU (uses the #4 high-priority interrupt)
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*
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* @note In single-core mode, it is not available.
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* This function calls the #4 high-priority interrupt on the other CPU.
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* The given function is called in the context of the interrupt by CALLX0 command and
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* operates with registers a2, a3, a4.
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*
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* @param[in] func Pointer to a function of type void func(void* arg) to be executed
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* @param[in] arg Arbitrary argument of type void* to be passed into the function
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*/
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void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
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/**
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* @brief Execute an asm function on the other CPU and blocks until it completes (uses the #4 high-priority interrupt)
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*
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* @note In single-core mode, it is not available.
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* This function calls the #4 high-priority interrupt on the other CPU.
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* The given function is called in the context of the interrupt by CALLX0 command.
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*
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* @param[in] func Pointer to a function of type void func(void* arg) to be executed
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* @param[in] arg Arbitrary argument of type void* to be passed into the function
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*/
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void esp_ipc_isr_asm_call_blocking(esp_ipc_isr_func_t func, void* arg);
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/**
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* @brief Stall the other CPU and the current CPU disables interrupts with level 3 and lower.
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*
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* @note In single-core mode, it is not available.
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* This function calls the #4 high-priority interrupt on the other CPU.
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* The esp_ipc_isr_finish_cmd() function is called on the other CPU in the context of the #4 high-priority interrupt.
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* The esp_ipc_isr_finish_cmd is called by CALLX0 command.
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* It is waiting for the end command. The command will be sent by esp_ipc_isr_release_other_cpu().
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* This function is used for DPORT workaround.
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*
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* This function blocks other CPU until the release call esp_ipc_isr_release_other_cpu().
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*
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* This fucntion is used for the DPORT workaround: stall other cpu that this cpu is pending to access dport register start.
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*/
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void esp_ipc_isr_stall_other_cpu(void);
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/**
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* @brief Release the other CPU
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*
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* @note In single-core mode, it is not available.
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* This function will send the end command to release the stall other CPU.
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* This function is used for DPORT workaround: stall other cpu that this cpu is pending to access dport register end.
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*
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*/
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void esp_ipc_isr_release_other_cpu(void);
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/**
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* @brief Pause stall the other CPU
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*/
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void esp_ipc_isr_stall_pause(void);
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/**
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* @brief Abort stall the other CPU
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*
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* This routine does not stop the stall routines in any way that is recoverable.
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* Please only call in case of panic().
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* Used in panic code: the enter_critical stuff may be messed up so we just stop everything without checking the mux.
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*/
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void esp_ipc_isr_stall_abort(void);
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/**
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* @brief Resume stall the other CPU
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*/
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void esp_ipc_isr_stall_resume(void);
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#else // not CONFIG_ESP_IPC_ISR_ENABLE
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#define esp_ipc_isr_stall_other_cpu()
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#define esp_ipc_isr_release_other_cpu()
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#define esp_ipc_isr_stall_pause()
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#define esp_ipc_isr_stall_abort()
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#define esp_ipc_isr_stall_resume()
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#endif // CONFIG_ESP_IPC_ISR_ENABLE
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#ifdef __cplusplus
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}
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#endif
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