mirror of
https://github.com/espressif/esp-idf.git
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262 lines
8.7 KiB
C
262 lines
8.7 KiB
C
/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** HMAC_SET_START_REG register
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* HMAC start control register
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*/
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#define HMAC_SET_START_REG (DR_REG_HMAC_BASE + 0x40)
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/** HMAC_SET_START : WS; bitpos: [0]; default: 0;
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* Configures whether or not to enable HMAC.
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* \\0: Disable HMAC
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* \\1: Enable HMAC
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*/
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#define HMAC_SET_START (BIT(0))
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#define HMAC_SET_START_M (HMAC_SET_START_V << HMAC_SET_START_S)
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#define HMAC_SET_START_V 0x00000001U
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#define HMAC_SET_START_S 0
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/** HMAC_SET_PARA_PURPOSE_REG register
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* HMAC parameter configuration register
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*/
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#define HMAC_SET_PARA_PURPOSE_REG (DR_REG_HMAC_BASE + 0x44)
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/** HMAC_PURPOSE_SET : WO; bitpos: [3:0]; default: 0;
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* Configures the HMAC purpose, refer to the Table <a
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* href=tab:hmac-key-purpose">link</a>. "
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*/
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#define HMAC_PURPOSE_SET 0x0000000FU
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#define HMAC_PURPOSE_SET_M (HMAC_PURPOSE_SET_V << HMAC_PURPOSE_SET_S)
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#define HMAC_PURPOSE_SET_V 0x0000000FU
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#define HMAC_PURPOSE_SET_S 0
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/** HMAC_SET_PARA_KEY_REG register
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* HMAC parameters configuration register
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*/
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#define HMAC_SET_PARA_KEY_REG (DR_REG_HMAC_BASE + 0x48)
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/** HMAC_KEY_SET : WO; bitpos: [2:0]; default: 0;
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* Configures HMAC key. There are six keys with index 0~5. Write the index of the
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* selected key to this field.
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*/
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#define HMAC_KEY_SET 0x00000007U
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#define HMAC_KEY_SET_M (HMAC_KEY_SET_V << HMAC_KEY_SET_S)
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#define HMAC_KEY_SET_V 0x00000007U
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#define HMAC_KEY_SET_S 0
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/** HMAC_SET_PARA_FINISH_REG register
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* HMAC configuration completion register
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*/
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#define HMAC_SET_PARA_FINISH_REG (DR_REG_HMAC_BASE + 0x4c)
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/** HMAC_SET_PARA_END : WS; bitpos: [0]; default: 0;
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* Configures whether to finish HMAC configuration.
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* \\0: No effect
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* \\1: Finish configuration
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*/
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#define HMAC_SET_PARA_END (BIT(0))
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#define HMAC_SET_PARA_END_M (HMAC_SET_PARA_END_V << HMAC_SET_PARA_END_S)
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#define HMAC_SET_PARA_END_V 0x00000001U
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#define HMAC_SET_PARA_END_S 0
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/** HMAC_SET_MESSAGE_ONE_REG register
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* HMAC message control register
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*/
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#define HMAC_SET_MESSAGE_ONE_REG (DR_REG_HMAC_BASE + 0x50)
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/** HMAC_SET_TEXT_ONE : WS; bitpos: [0]; default: 0;
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* Calls SHA to calculate one message block.
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*/
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#define HMAC_SET_TEXT_ONE (BIT(0))
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#define HMAC_SET_TEXT_ONE_M (HMAC_SET_TEXT_ONE_V << HMAC_SET_TEXT_ONE_S)
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#define HMAC_SET_TEXT_ONE_V 0x00000001U
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#define HMAC_SET_TEXT_ONE_S 0
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/** HMAC_SET_MESSAGE_ING_REG register
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* HMAC message continue register
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*/
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#define HMAC_SET_MESSAGE_ING_REG (DR_REG_HMAC_BASE + 0x54)
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/** HMAC_SET_TEXT_ING : WS; bitpos: [0]; default: 0;
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* Configures whether or not there are unprocessed message blocks.
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* \\0: No unprocessed message block
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* \\1: There are still some message blocks to be processed.
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*/
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#define HMAC_SET_TEXT_ING (BIT(0))
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#define HMAC_SET_TEXT_ING_M (HMAC_SET_TEXT_ING_V << HMAC_SET_TEXT_ING_S)
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#define HMAC_SET_TEXT_ING_V 0x00000001U
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#define HMAC_SET_TEXT_ING_S 0
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/** HMAC_SET_MESSAGE_END_REG register
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* HMAC message end register
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*/
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#define HMAC_SET_MESSAGE_END_REG (DR_REG_HMAC_BASE + 0x58)
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/** HMAC_SET_TEXT_END : WS; bitpos: [0]; default: 0;
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* Configures whether to start hardware padding.
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* \\0: No effect
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* \\1: Start hardware padding
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*/
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#define HMAC_SET_TEXT_END (BIT(0))
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#define HMAC_SET_TEXT_END_M (HMAC_SET_TEXT_END_V << HMAC_SET_TEXT_END_S)
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#define HMAC_SET_TEXT_END_V 0x00000001U
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#define HMAC_SET_TEXT_END_S 0
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/** HMAC_SET_RESULT_FINISH_REG register
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* HMAC result reading finish register
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*/
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#define HMAC_SET_RESULT_FINISH_REG (DR_REG_HMAC_BASE + 0x5c)
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/** HMAC_SET_RESULT_END : WS; bitpos: [0]; default: 0;
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* Configures whether to exit upstream mode and clear calculation results.
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* \\0: Not exit
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* \\1: Exit upstream mode and clear calculation results.
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*/
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#define HMAC_SET_RESULT_END (BIT(0))
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#define HMAC_SET_RESULT_END_M (HMAC_SET_RESULT_END_V << HMAC_SET_RESULT_END_S)
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#define HMAC_SET_RESULT_END_V 0x00000001U
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#define HMAC_SET_RESULT_END_S 0
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/** HMAC_SET_INVALIDATE_JTAG_REG register
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* Invalidate JTAG result register
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*/
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#define HMAC_SET_INVALIDATE_JTAG_REG (DR_REG_HMAC_BASE + 0x60)
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/** HMAC_SET_INVALIDATE_JTAG : WS; bitpos: [0]; default: 0;
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* Configures whether or not to clear calculation results when re-enabling JTAG in
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* downstream mode.
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* \\0: Not clear
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* \\1: Clear calculation results
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*/
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#define HMAC_SET_INVALIDATE_JTAG (BIT(0))
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#define HMAC_SET_INVALIDATE_JTAG_M (HMAC_SET_INVALIDATE_JTAG_V << HMAC_SET_INVALIDATE_JTAG_S)
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#define HMAC_SET_INVALIDATE_JTAG_V 0x00000001U
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#define HMAC_SET_INVALIDATE_JTAG_S 0
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/** HMAC_SET_INVALIDATE_DS_REG register
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* Invalidate digital signature result register
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*/
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#define HMAC_SET_INVALIDATE_DS_REG (DR_REG_HMAC_BASE + 0x64)
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/** HMAC_SET_INVALIDATE_DS : WS; bitpos: [0]; default: 0;
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* Configures whether or not to clear calculation results of the DS module in
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* downstream mode.
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* \\0: Not clear
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* \\1: Clear calculation results
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*/
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#define HMAC_SET_INVALIDATE_DS (BIT(0))
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#define HMAC_SET_INVALIDATE_DS_M (HMAC_SET_INVALIDATE_DS_V << HMAC_SET_INVALIDATE_DS_S)
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#define HMAC_SET_INVALIDATE_DS_V 0x00000001U
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#define HMAC_SET_INVALIDATE_DS_S 0
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/** HMAC_QUERY_ERROR_REG register
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* Stores matching results between keys generated by users and corresponding purposes
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*/
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#define HMAC_QUERY_ERROR_REG (DR_REG_HMAC_BASE + 0x68)
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/** HMAC_QUREY_CHECK : RO; bitpos: [0]; default: 0;
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* Represents whether or not an HMAC key matches the purpose.
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* \\0: Match
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* \\1: Error
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*/
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#define HMAC_QUREY_CHECK (BIT(0))
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#define HMAC_QUREY_CHECK_M (HMAC_QUREY_CHECK_V << HMAC_QUREY_CHECK_S)
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#define HMAC_QUREY_CHECK_V 0x00000001U
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#define HMAC_QUREY_CHECK_S 0
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/** HMAC_QUERY_BUSY_REG register
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* Busy state of HMAC module
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*/
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#define HMAC_QUERY_BUSY_REG (DR_REG_HMAC_BASE + 0x6c)
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/** HMAC_BUSY_STATE : RO; bitpos: [0]; default: 0;
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* Represents whether or not HMAC is in a busy state. Before configuring HMAC, please
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* make sure HMAC is in an IDLE state.
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* \\0: Idle
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* \\1: HMAC is still working on the calculation
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*/
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#define HMAC_BUSY_STATE (BIT(0))
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#define HMAC_BUSY_STATE_M (HMAC_BUSY_STATE_V << HMAC_BUSY_STATE_S)
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#define HMAC_BUSY_STATE_V 0x00000001U
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#define HMAC_BUSY_STATE_S 0
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/** HMAC_WR_MESSAGE_MEM register
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* Message block memory.
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*/
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#define HMAC_WR_MESSAGE_MEM (DR_REG_HMAC_BASE + 0x80)
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#define HMAC_WR_MESSAGE_MEM_SIZE_BYTES 64
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/** HMAC_RD_RESULT_MEM register
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* Result from upstream.
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*/
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#define HMAC_RD_RESULT_MEM (DR_REG_HMAC_BASE + 0xc0)
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#define HMAC_RD_RESULT_MEM_SIZE_BYTES 32
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/** HMAC_SET_MESSAGE_PAD_REG register
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* Software padding register
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*/
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#define HMAC_SET_MESSAGE_PAD_REG (DR_REG_HMAC_BASE + 0xf0)
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/** HMAC_SET_TEXT_PAD : WO; bitpos: [0]; default: 0;
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* Configures whether or not the padding is applied by software.
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* \\0: Not applied by software
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* \\1: Applied by software
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*/
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#define HMAC_SET_TEXT_PAD (BIT(0))
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#define HMAC_SET_TEXT_PAD_M (HMAC_SET_TEXT_PAD_V << HMAC_SET_TEXT_PAD_S)
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#define HMAC_SET_TEXT_PAD_V 0x00000001U
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#define HMAC_SET_TEXT_PAD_S 0
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/** HMAC_ONE_BLOCK_REG register
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* One block message register
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*/
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#define HMAC_ONE_BLOCK_REG (DR_REG_HMAC_BASE + 0xf4)
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/** HMAC_SET_ONE_BLOCK : WS; bitpos: [0]; default: 0;
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* Write 1 to indicate there is only one block which already contains padding bits and
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* there is no need for padding.
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*/
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#define HMAC_SET_ONE_BLOCK (BIT(0))
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#define HMAC_SET_ONE_BLOCK_M (HMAC_SET_ONE_BLOCK_V << HMAC_SET_ONE_BLOCK_S)
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#define HMAC_SET_ONE_BLOCK_V 0x00000001U
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#define HMAC_SET_ONE_BLOCK_S 0
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/** HMAC_SOFT_JTAG_CTRL_REG register
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* Jtag register 0.
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*/
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#define HMAC_SOFT_JTAG_CTRL_REG (DR_REG_HMAC_BASE + 0xf8)
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/** HMAC_SOFT_JTAG_CTRL : WS; bitpos: [0]; default: 0;
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* Configures whether or not to enable JTAG authentication mode.
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* \\0: Disable
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* \\1: Enable
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* \\
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*/
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#define HMAC_SOFT_JTAG_CTRL (BIT(0))
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#define HMAC_SOFT_JTAG_CTRL_M (HMAC_SOFT_JTAG_CTRL_V << HMAC_SOFT_JTAG_CTRL_S)
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#define HMAC_SOFT_JTAG_CTRL_V 0x00000001U
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#define HMAC_SOFT_JTAG_CTRL_S 0
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/** HMAC_WR_JTAG_REG register
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* Re-enable JTAG register 1
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*/
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#define HMAC_WR_JTAG_REG (DR_REG_HMAC_BASE + 0xfc)
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/** HMAC_WR_JTAG : WO; bitpos: [31:0]; default: 0;
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* Writes the comparing input used for re-enabling JTAG.
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*/
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#define HMAC_WR_JTAG 0xFFFFFFFFU
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#define HMAC_WR_JTAG_M (HMAC_WR_JTAG_V << HMAC_WR_JTAG_S)
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#define HMAC_WR_JTAG_V 0xFFFFFFFFU
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#define HMAC_WR_JTAG_S 0
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/** HMAC_DATE_REG register
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* Version control register
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*/
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#define HMAC_DATE_REG (DR_REG_HMAC_BASE + 0x1fc)
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/** HMAC_DATE : R/W; bitpos: [29:0]; default: 539166977;
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* Hmac date information/ hmac version information.
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*/
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#define HMAC_DATE 0x3FFFFFFFU
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#define HMAC_DATE_M (HMAC_DATE_V << HMAC_DATE_S)
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#define HMAC_DATE_V 0x3FFFFFFFU
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#define HMAC_DATE_S 0
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#ifdef __cplusplus
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}
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#endif
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