esp-idf/components/esp_hw_support/port/esp32h2
Omar Chebib 752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
..
private_include G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
chip_info.c soc: Adds efuse hal 2022-02-24 22:20:09 +08:00
CMakeLists.txt esp_hw_support: Add esp_cpu.h abstraction and API 2022-06-14 14:30:58 +08:00
esp_crypto_lock.c esp_hw_support: update copyright notice 5 2021-08-10 13:32:08 +02:00
esp_ds.c global: make periph enable/disable APIs private 2021-11-08 10:37:47 +08:00
esp_hmac.c global: make periph enable/disable APIs private 2021-11-08 10:37:47 +08:00
esp_memprot.c System/Security: Memprot API unified (ESP32C3) 2021-12-21 01:50:36 +01:00
i2c_brownout.h esp_hw_support: update copyright notice 5 2021-08-10 13:32:08 +02:00
Kconfig.mac esp32h2: update esp_system and esp_hw_support to support esp32h2 2021-07-01 19:53:11 +08:00
Kconfig.rtc clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
rtc_clk_init.c clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
rtc_clk.c clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
rtc_init.c clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
rtc_pm.c rename APB_CTRL ro SYS_CON 2021-09-16 20:57:57 +08:00
rtc_sleep.c pm: putting dbias and pd_cur code into same function 2022-05-14 02:35:11 +08:00
rtc_time.c clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00