mirror of
https://github.com/espressif/esp-idf.git
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152 lines
3.9 KiB
C
152 lines
3.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/cp_dma_struct.h"
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#define CP_DMA_LL_EVENT_RX_DONE (1 << 0)
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#define CP_DMA_LL_EVENT_RX_EOF (1 << 1)
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#define CP_DMA_LL_EVENT_TX_DONE (1 << 2)
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#define CP_DMA_LL_EVENT_TX_EOF (1 << 3)
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#define CP_DMA_LL_EVENT_RX_DESC_ERR (1 << 4)
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#define CP_DMA_LL_EVENT_TX_DESC_ERR (1 << 5)
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#define CP_DMA_LL_EVENT_RX_DESC_EMPTY (1 << 6)
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#define CP_DMA_LL_EVENT_TX_TOTAL_EOF (1 << 7)
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#define CP_DMA_LL_EVENT_ALL (0xFF)
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/**
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* Copy DMA firstly reads data to be transferred from internal RAM,
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* stores the data into DMA FIFO via an outlink,
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* and then writes the data to the destination internal RAM via an inlink.
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*/
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static inline void cp_dma_ll_reset_in_link(cp_dma_dev_t *dev)
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{
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dev->dma_conf.dma_in_rst = 1;
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dev->dma_conf.dma_in_rst = 0;
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}
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static inline void cp_dma_ll_reset_out_link(cp_dma_dev_t *dev)
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{
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dev->dma_conf.dma_out_rst = 1;
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dev->dma_conf.dma_out_rst = 0;
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}
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static inline void cp_dma_ll_reset_fifo(cp_dma_dev_t *dev)
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{
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dev->dma_conf.dma_fifo_rst = 1;
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dev->dma_conf.dma_fifo_rst = 0;
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}
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static inline void cp_dma_ll_reset_cmd_fifo(cp_dma_dev_t *dev)
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{
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dev->dma_conf.dma_cmdfifo_rst = 1;
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dev->dma_conf.dma_cmdfifo_rst = 0;
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}
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static inline void cp_dma_ll_enable_owner_check(cp_dma_dev_t *dev, bool enable)
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{
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dev->dma_conf.dma_check_owner = enable;
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dev->dma_conf.dma_out_auto_wrback = 1;
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dev->dma_conf.dma_out_owner = 0;
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dev->dma_conf.dma_in_owner = 0;
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}
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static inline void cp_dma_ll_enable_clock(cp_dma_dev_t *dev, bool enable)
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{
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dev->dma_conf.dma_clk_en = enable;
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}
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static inline void cp_dma_ll_enable_intr(cp_dma_dev_t *dev, uint32_t mask, bool enable)
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{
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if (enable) {
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dev->dma_int_ena.val |= mask;
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} else {
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dev->dma_int_ena.val &= ~mask;
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}
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}
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static inline __attribute__((always_inline)) uint32_t cp_dma_ll_get_intr_status(cp_dma_dev_t *dev)
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{
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return dev->dma_int_st.val;
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}
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static inline __attribute__((always_inline)) void cp_dma_ll_clear_intr_status(cp_dma_dev_t *dev, uint32_t mask)
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{
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dev->dma_int_clr.val = mask;
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}
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static inline void cp_dma_ll_tx_set_descriptor_base_addr(cp_dma_dev_t *dev, uint32_t address)
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{
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dev->dma_out_link.dma_outlink_addr = address;
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}
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static inline void cp_dma_ll_rx_set_descriptor_base_addr(cp_dma_dev_t *dev, uint32_t address)
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{
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dev->dma_in_link.dma_inlink_addr = address;
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}
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static inline void cp_dma_ll_start_tx(cp_dma_dev_t *dev, bool enable)
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{
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if (enable) {
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dev->dma_out_link.dma_outlink_start = 1; // cleared automatically by HW
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} else {
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dev->dma_out_link.dma_outlink_stop = 1; // cleared automatically by HW
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}
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}
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static inline void cp_dma_ll_start_rx(cp_dma_dev_t *dev, bool enable)
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{
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if (enable) {
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dev->dma_in_link.dma_inlink_start = 1; // cleared automatically by HW
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} else {
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dev->dma_in_link.dma_inlink_stop = 1; // cleared automatically by HW
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}
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}
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static inline void cp_dma_ll_restart_tx(cp_dma_dev_t *dev)
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{
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dev->dma_out_link.dma_outlink_restart = 1; // cleared automatically by HW
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}
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static inline void cp_dma_ll_restart_rx(cp_dma_dev_t *dev)
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{
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dev->dma_in_link.dma_inlink_restart = 1; // cleared automatically by HW
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}
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// get the address of last rx descriptor
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static inline uint32_t cp_dma_ll_get_rx_eof_descriptor_address(cp_dma_dev_t *dev)
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{
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return dev->dma_in_eof_des_addr.dma_in_suc_eof_des_addr;
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}
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// get the address of last tx descriptor
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static inline uint32_t cp_dma_ll_get_tx_eof_descriptor_address(cp_dma_dev_t *dev)
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{
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return dev->dma_out_eof_des_addr.dma_out_eof_des_addr;
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}
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static inline uint32_t cp_dma_ll_get_tx_status(cp_dma_dev_t *dev)
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{
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return dev->dma_out_st.val;
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}
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static inline uint32_t cp_dma_ll_get_rx_status(cp_dma_dev_t *dev)
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{
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return dev->dma_in_st.val;
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}
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#ifdef __cplusplus
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}
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#endif
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