esp-idf/components/soc
2024-07-29 16:16:36 +08:00
..
esp32 change(wdt): create wdt_periph.c in soc component 2024-06-18 09:59:06 +08:00
esp32c2 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
esp32c3 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
esp32c5 Merge branch 'feature/esp32c61_regi2c_support' into 'master' 2024-07-29 11:52:41 +08:00
esp32c6 feat(mmu): added 8KB mmu page size option for c6 h2 2024-07-29 16:16:36 +08:00
esp32c61 feat(mmu): supported on c61 2024-07-29 16:16:36 +08:00
esp32h2 feat(mmu): added 8KB mmu page size option for c6 h2 2024-07-29 16:16:36 +08:00
esp32p4 change(mmu): removed not-used SOC_MMU_PAGE_SIZE_CONFIGURABLE macro which is 0 on p4 2024-07-29 16:16:36 +08:00
esp32s2 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
esp32s3 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
include/soc feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
linux/include/soc feat(efuse): Support Linux target 2024-05-15 16:54:45 +03:00
CMakeLists.txt change(wdt): create wdt_periph.c in soc component 2024-06-18 09:59:06 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig feat(mmu): added 8KB mmu page size option for c6 h2 2024-07-29 16:16:36 +08:00
linker.lf
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware