Alexey Gerenkov dfd3a9c3bc riscv: Use semihosting to set breakpoint and watchpoint when running under debugger		2022-04-22 13:17:54 +03:00
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include/freertos	Merge branch 'bugfix/silent_asserts_v4.3' into 'release/v4.3'	2021-04-13 04:30:09 +00:00
port.c	riscv: Use semihosting to set breakpoint and watchpoint when running under debugger	2022-04-22 13:17:54 +03:00
portasm.S	core: fix cases where riscv SP were not 16 byte aligned	2021-06-02 16:02:10 +08:00