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esp-idf/examples/system/ulp_riscv/i2c/main
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Sudeep Mohanty 099f648686 ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 
This commit fixes an issue where in the ULP RISC-V I2C example causes
a spurious wakeup of the main CPU because of a Trap signal when the ULP
core does not meet the wakeup threshold values. This was due to the fact
that the RTC_CNTL_COCPU_DONE signal was being set before the
RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V
core to not reset properly on each cycle.

Closes https://github.com/espressif/esp-idf/issues/10301
2022-12-27 07:44:26 +00:00
..
ulp ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 2022-12-27 07:44:26 +00:00
bmp180_defs.h ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 2022-12-27 07:44:26 +00:00
CMakeLists.txt system: fix printf format errors in all system and cxx examples 2022-12-12 12:55:02 +08:00
ulp_riscv_rtc_i2c_example_main.c ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 2022-12-27 07:44:26 +00:00