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https://github.com/espressif/esp-idf.git
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3711a032ff
A part of the test 'Can allocate IRAM int only with an IRAM handler' was to allocate an intr with the handler in RTC memory which is not supported by esp32c2. A condition was added to prevent this part of the test to execute on esp32c2 targets.
359 lines
10 KiB
C
359 lines
10 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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Tests for the interrupt allocator.
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*/
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#include <stdio.h>
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#include "sdkconfig.h"
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#include "esp_types.h"
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#include "esp_rom_sys.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "unity.h"
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#include "esp_intr_alloc.h"
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#include "driver/gptimer.h"
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#include "soc/soc_caps.h"
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#include "soc/spi_periph.h"
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#include "hal/spi_ll.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/gptimer.h"
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static bool on_timer_alarm(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx)
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{
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volatile int *count = (volatile int *)user_ctx;
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(*count)++;
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return false;
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}
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static void timer_test(int flags)
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{
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static int count[SOC_TIMER_GROUP_TOTAL_TIMERS] = {0};
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gptimer_handle_t gptimers[SOC_TIMER_GROUP_TOTAL_TIMERS];
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intr_handle_t inth[SOC_TIMER_GROUP_TOTAL_TIMERS];
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gptimer_config_t config = {
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.clk_src = GPTIMER_CLK_SRC_DEFAULT,
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.direction = GPTIMER_COUNT_UP,
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.resolution_hz = 1000000,
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.flags.intr_shared = (flags & ESP_INTR_FLAG_SHARED) == ESP_INTR_FLAG_SHARED,
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};
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ESP_OK(gptimer_new_timer(&config, &gptimers[i]));
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}
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gptimer_alarm_config_t alarm_config = {
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.reload_count = 0,
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.alarm_count = 100000,
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.flags.auto_reload_on_alarm = true,
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};
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gptimer_event_callbacks_t cbs = {
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.on_alarm = on_timer_alarm,
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};
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ESP_OK(gptimer_register_event_callbacks(gptimers[i], &cbs, &count[i]));
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alarm_config.alarm_count += 10000 * i;
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TEST_ESP_OK(gptimer_set_alarm_action(gptimers[i], &alarm_config));
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TEST_ESP_OK(gptimer_enable(gptimers[i]));
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TEST_ESP_OK(gptimer_start(gptimers[i]));
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TEST_ESP_OK(gptimer_get_intr_handle(gptimers[i], &inth[i]));
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printf("Interrupts allocated: %d\r\n", esp_intr_get_intno(inth[i]));
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}
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if ((flags & ESP_INTR_FLAG_SHARED)) {
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/* Check that the allocated interrupts are acutally shared */
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int intr_num = esp_intr_get_intno(inth[0]);
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT_EQUAL(intr_num, esp_intr_get_intno(inth[i]));
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}
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}
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer values after 1 sec:");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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printf(" %d", count[i]);
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}
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printf("\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT_NOT_EQUAL(0, count[i]);
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}
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printf("Disabling timers' interrupt...\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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esp_intr_disable(inth[i]);
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count[i] = 0;
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}
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer values after 1 sec:");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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printf(" %d", count[i]);
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}
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printf("\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT_EQUAL(0, count[i]);
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}
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ESP_OK(gptimer_stop(gptimers[i]));
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TEST_ESP_OK(gptimer_disable(gptimers[i]));
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TEST_ESP_OK(gptimer_del_timer(gptimers[i]));
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}
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}
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TEST_CASE("Intr_alloc test, private ints", "[intr_alloc]")
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{
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timer_test(0);
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}
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TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]")
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{
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timer_test(ESP_INTR_FLAG_SHARED);
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}
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void static test_isr(void*arg)
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{
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/* ISR should never be called */
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abort();
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}
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TEST_CASE("Allocate previously freed interrupt, with different flags", "[intr_alloc]")
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{
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intr_handle_t intr;
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int test_intr_source = ETS_GPIO_INTR_SOURCE;
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int isr_flags = ESP_INTR_FLAG_LEVEL2;
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TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
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TEST_ESP_OK(esp_intr_free(intr));
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isr_flags = ESP_INTR_FLAG_LEVEL3;
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TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
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TEST_ESP_OK(esp_intr_free(intr));
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}
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typedef struct {
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bool flag1;
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bool flag2;
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bool flag3;
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bool flag4;
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} intr_alloc_test_ctx_t;
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void IRAM_ATTR int_handler1(void *arg)
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{
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intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
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esp_rom_printf("handler 1 called.\n");
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if ( ctx->flag1 ) {
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ctx->flag3 = true;
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} else {
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ctx->flag1 = true;
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}
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_clear_int_stat(&SPI2);
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#else
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spi_ll_clear_int_stat(&GPSPI2);
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#endif
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}
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void IRAM_ATTR int_handler2(void *arg)
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{
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intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
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esp_rom_printf("handler 2 called.\n");
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if ( ctx->flag2 ) {
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ctx->flag4 = true;
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} else {
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ctx->flag2 = true;
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}
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}
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TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[intr_alloc]")
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{
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intr_alloc_test_ctx_t ctx = {false, false, false, false };
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intr_handle_t handle1, handle2;
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// enable SPI2
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periph_module_enable(spi_periph_signal[1].module);
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esp_err_t r;
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r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);
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TEST_ESP_OK(r);
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//try an invalid assign first
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r = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler2, NULL, &handle2);
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TEST_ASSERT_EQUAL_INT(ESP_ERR_NOT_FOUND, r);
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//assign shared then
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r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler2, &ctx, &handle2);
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TEST_ESP_OK(r);
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_enable_int(&SPI2);
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#else
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spi_ll_enable_int(&GPSPI2);
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#endif
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printf("trigger first time.\n");
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_set_int_stat(&SPI2);
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#else
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spi_ll_set_int_stat(&GPSPI2);
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#endif
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vTaskDelay(100);
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TEST_ASSERT( ctx.flag1 && ctx.flag2 );
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printf("remove intr 1.\n");
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r = esp_intr_free(handle2);
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printf("trigger second time.\n");
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_set_int_stat(&SPI2);
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#else
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spi_ll_set_int_stat(&GPSPI2);
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#endif
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vTaskDelay(500);
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TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
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printf("test passed.\n");
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esp_intr_free(handle1);
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}
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static void dummy(void *arg)
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{
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}
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static IRAM_ATTR void dummy_iram(void *arg)
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{
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}
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// RTC not supported on all target (e.g., esp32c2)
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#if SOC_RTC_FAST_MEM_SUPPORTED
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static RTC_IRAM_ATTR void dummy_rtc(void *arg)
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{
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}
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#endif
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TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
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{
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intr_handle_t ih;
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esp_err_t err = esp_intr_alloc(spi_periph_signal[1].irq,
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ESP_INTR_FLAG_IRAM, &dummy, NULL, &ih);
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TEST_ASSERT_EQUAL_INT(ESP_ERR_INVALID_ARG, err);
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err = esp_intr_alloc(spi_periph_signal[1].irq,
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ESP_INTR_FLAG_IRAM, &dummy_iram, NULL, &ih);
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TEST_ESP_OK(err);
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err = esp_intr_free(ih);
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TEST_ESP_OK(err);
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// RTC not supported on all target (e.g., esp32c2)
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#if SOC_RTC_FAST_MEM_SUPPORTED
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err = esp_intr_alloc(spi_periph_signal[1].irq,
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ESP_INTR_FLAG_IRAM, &dummy_rtc, NULL, &ih);
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TEST_ESP_OK(err);
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err = esp_intr_free(ih);
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TEST_ESP_OK(err);
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#endif
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}
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#ifndef CONFIG_FREERTOS_UNICORE
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void isr_free_task(void *param)
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{
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esp_err_t ret = ESP_FAIL;
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intr_handle_t *test_handle = (intr_handle_t *)param;
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if (*test_handle != NULL) {
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ret = esp_intr_free(*test_handle);
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if (ret == ESP_OK) {
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*test_handle = NULL;
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}
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}
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vTaskDelete(NULL);
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}
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void isr_alloc_free_test(void)
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{
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intr_handle_t test_handle = NULL;
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esp_err_t ret = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler1, NULL, &test_handle);
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if (ret != ESP_OK) {
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printf("alloc isr handle fail\n");
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} else {
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printf("alloc isr handle on core %d\n", esp_intr_get_cpu(test_handle));
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}
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TEST_ASSERT(ret == ESP_OK);
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xTaskCreatePinnedToCore(isr_free_task, "isr_free_task", 1024 * 2, (void *)&test_handle, 10, NULL, !xPortGetCoreID());
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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TEST_ASSERT(test_handle == NULL);
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printf("test passed\n");
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}
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TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
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{
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isr_alloc_free_test();
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}
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#endif
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#if __XTENSA__
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static volatile int int_timer_ctr;
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void int_timer_handler(void *arg)
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{
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xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
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int_timer_ctr++;
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}
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static void local_timer_test(void)
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{
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intr_handle_t ih;
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esp_err_t r;
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r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
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TEST_ASSERT(r == ESP_OK);
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printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
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xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
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int_timer_ctr = 0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr != 0);
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printf("Disabling int\n");
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esp_intr_disable(ih);
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int_timer_ctr = 0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr == 0);
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printf("Re-enabling\n");
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esp_intr_enable(ih);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr != 0);
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printf("Free int, re-alloc disabled\n");
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r = esp_intr_free(ih);
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TEST_ASSERT(r == ESP_OK);
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r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
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TEST_ASSERT(r == ESP_OK);
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int_timer_ctr = 0;
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr == 0);
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printf("Re-enabling\n");
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esp_intr_enable(ih);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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printf("Timer val after 1 sec: %d\n", int_timer_ctr);
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TEST_ASSERT(int_timer_ctr != 0);
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r = esp_intr_free(ih);
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TEST_ASSERT(r == ESP_OK);
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printf("Done.\n");
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}
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TEST_CASE("Intr_alloc test, CPU-local int source", "[intr_alloc]")
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{
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local_timer_test();
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}
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#endif // #if __XTENSA__
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