mirror of
https://github.com/espressif/esp-idf.git
synced 2024-09-20 00:36:01 -04:00
227 lines
7.6 KiB
C
227 lines
7.6 KiB
C
/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_types.h"
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#include "sdkconfig.h"
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#include "esp_err.h"
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#include "esp_check.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_image_format.h"
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#include "esp_app_format.h"
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#include "esp_flash_partitions.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "hal/mmu_hal.h"
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#include "hal/mmu_ll.h"
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#include "soc/soc.h"
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#include "soc/soc_caps.h"
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#include "soc/ext_mem_defs.h"
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#include "esp_private/image_process.h"
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#include "esp_private/esp_cache_esp32_private.h"
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/**
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* ESP32 bootloader size is not enough, not enable this feature for now
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*/
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#define IMAGE_PROCESS_SUPPORTED_TARGETS (!CONFIG_IDF_TARGET_ESP32)
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#if CONFIG_IDF_TARGET_ESP32
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#define MMAP_MMU_SIZE 0x320000
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define MMAP_MMU_SIZE (SOC_DRAM0_CACHE_ADDRESS_HIGH - SOC_DRAM0_CACHE_ADDRESS_LOW)
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#else
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#define MMAP_MMU_SIZE (SOC_DRAM_FLASH_ADDRESS_HIGH - SOC_DRAM_FLASH_ADDRESS_LOW)
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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#define FLASH_READ_VADDR (SOC_DROM_LOW + MMAP_MMU_SIZE)
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#else
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#define FLASH_READ_VADDR (SOC_DROM_LOW + MMAP_MMU_SIZE - CONFIG_MMU_PAGE_SIZE)
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#endif
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#define MMU_FLASH_MASK (~(CONFIG_MMU_PAGE_SIZE - 1))
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const static char *TAG = "image_process";
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static uint32_t s_current_read_mapping = UINT32_MAX;
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static uint32_t s_flash_drom_paddr_start = 0;
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static uint32_t s_flash_irom_paddr_start = 0;
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static esp_err_t process_segments(esp_image_metadata_t *data);
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static image_process_driver_t s_image_process_driver = {
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process_segments,
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};
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static esp_err_t flash_read(size_t src_addr, void *dest, size_t size)
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{
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if (src_addr & 3) {
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ESP_EARLY_LOGE(TAG, "flash_read src_addr 0x%x not 4-byte aligned", src_addr);
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return ESP_ERR_INVALID_ARG;
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}
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if (size & 3) {
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ESP_EARLY_LOGE(TAG, "flash_read size 0x%x not 4-byte aligned", size);
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return ESP_ERR_INVALID_ARG;
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}
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if ((intptr_t)dest & 3) {
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ESP_EARLY_LOGE(TAG, "flash_read dest 0x%x not 4-byte aligned", (intptr_t)dest);
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return ESP_ERR_INVALID_ARG;
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}
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uint32_t *dest_words = (uint32_t *)dest;
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for (size_t word = 0; word < size / 4; word++) {
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uint32_t word_src = src_addr + word * 4; /* Read this offset from flash */
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uint32_t map_at = word_src & MMU_FLASH_MASK; /* Map this 64KB block from flash */
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uint32_t *map_ptr;
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/* Move the 64KB mmu mapping window to fit map_at */
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if (map_at != s_current_read_mapping) {
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cache_hal_suspend(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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uint32_t actual_mapped_len = 0;
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mmu_hal_map_region(0, MMU_TARGET_FLASH0, FLASH_READ_VADDR, map_at, CONFIG_MMU_PAGE_SIZE - 1, &actual_mapped_len);
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s_current_read_mapping = map_at;
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ESP_EARLY_LOGD(TAG, "starting from paddr=0x%" PRIx32 " and vaddr=0x%" PRIx32 ", 0x%" PRIx32 " bytes are mapped", map_at, FLASH_READ_VADDR, actual_mapped_len);
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#if CONFIG_IDF_TARGET_ESP32
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cache_sync();
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#else
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cache_hal_invalidate_addr(FLASH_READ_VADDR, actual_mapped_len);
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#endif
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cache_hal_resume(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
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}
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map_ptr = (uint32_t *)(FLASH_READ_VADDR + (word_src - map_at));
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dest_words[word] = *map_ptr;
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}
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return ESP_OK;
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}
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#if IMAGE_PROCESS_SUPPORTED_TARGETS
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static esp_err_t process_image_header(esp_image_metadata_t *data, uint32_t part_offset)
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{
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bzero(data, sizeof(esp_image_metadata_t));
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data->start_addr = part_offset;
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ESP_RETURN_ON_ERROR_ISR(flash_read(data->start_addr, &data->image, sizeof(esp_image_header_t)), TAG, "failed to read image");
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data->image_len = sizeof(esp_image_header_t);
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ESP_EARLY_LOGD(TAG, "reading image header=0x%"PRIx32" image_len=0x%"PRIx32" image.segment_count=0x%x", data->start_addr, data->image_len, data->image.segment_count);
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return ESP_OK;
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}
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#endif
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static esp_err_t process_segment(int index, uint32_t flash_addr, esp_image_segment_header_t *header, esp_image_metadata_t *metadata, int *cnt)
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{
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/* read segment header */
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ESP_RETURN_ON_ERROR_ISR(flash_read(flash_addr, header, sizeof(esp_image_segment_header_t)), TAG, "failed to do flash read");
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intptr_t load_addr = header->load_addr;
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uint32_t data_len = header->data_len;
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uint32_t data_addr = flash_addr + sizeof(esp_image_segment_header_t);
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#if SOC_MMU_DI_VADDR_SHARED
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#if CONFIG_SPIRAM_FLASH_LOAD_TO_PSRAM
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if (load_addr >= SOC_DRAM_PSRAM_ADDRESS_LOW && load_addr < SOC_DRAM_PSRAM_ADDRESS_HIGH) {
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if (*cnt == 0) {
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s_flash_drom_paddr_start = data_addr;
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} else if (*cnt == 1) {
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s_flash_irom_paddr_start = data_addr;
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}
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(*cnt)++;
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}
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#else
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if (load_addr >= SOC_DRAM_FLASH_ADDRESS_LOW && load_addr < SOC_DRAM_FLASH_ADDRESS_HIGH) {
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if (*cnt == 0) {
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s_flash_drom_paddr_start = data_addr;
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} else if (*cnt == 1) {
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s_flash_irom_paddr_start = data_addr;
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}
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(*cnt)++;
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}
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#endif
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#else
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if (load_addr >= SOC_IRAM_FLASH_ADDRESS_LOW && load_addr < SOC_IRAM_FLASH_ADDRESS_HIGH) {
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s_flash_drom_paddr_start = data_addr;
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(*cnt)++;
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}
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if (load_addr >= SOC_DRAM_FLASH_ADDRESS_LOW && load_addr < SOC_DRAM_FLASH_ADDRESS_HIGH) {
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s_flash_irom_paddr_start = data_addr;
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(*cnt)++;
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}
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#endif
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ESP_EARLY_LOGD(TAG, "load_addr: %x, data_len: %x, flash_addr: 0x%x, data_addr: %x", load_addr, data_len, flash_addr, data_addr);
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if (data_len % 4 != 0) {
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ESP_RETURN_ON_FALSE_ISR(false, ESP_ERR_INVALID_STATE, TAG, "unaligned segment length 0x%"PRIx32, data_len);
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}
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return ESP_OK;
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}
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static esp_err_t process_segments(esp_image_metadata_t *data)
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{
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uint32_t start_segments = data->start_addr + data->image_len;
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uint32_t next_addr = start_segments;
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int cnt = 0;
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for (int i = 0; i < data->image.segment_count; i++) {
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esp_image_segment_header_t *header = &data->segments[i];
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ESP_EARLY_LOGD(TAG, "loading segment header %d at offset 0x%"PRIx32, i, next_addr);
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ESP_RETURN_ON_ERROR_ISR(process_segment(i, next_addr, header, data, &cnt), TAG, "failed to process segment");
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next_addr += sizeof(esp_image_segment_header_t);
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data->segment_data[i] = next_addr;
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next_addr += header->data_len;
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}
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assert(cnt == 2);
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uint32_t end_addr = next_addr;
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if (end_addr < data->start_addr) {
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return ESP_FAIL;
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}
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data->image_len += end_addr - start_segments;
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return ESP_OK;
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}
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void image_process_get_flash_segments_info(uint32_t *out_drom_paddr_start, uint32_t *out_irom_paddr_start)
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{
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assert(out_drom_paddr_start && out_irom_paddr_start);
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*out_drom_paddr_start = s_flash_drom_paddr_start;
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*out_irom_paddr_start = s_flash_irom_paddr_start;
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}
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esp_err_t image_process(void)
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{
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#if IMAGE_PROCESS_SUPPORTED_TARGETS
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esp_err_t ret = ESP_FAIL;
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/**
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* We use the MMU_LL_END_DROM_ENTRY_ID mmu entry as a map page for app to find the boot partition
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* This depends on 2nd bootloader to set the entry
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*/
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uint32_t paddr_base = mmu_ll_entry_id_to_paddr_base(0, MMU_LL_END_DROM_ENTRY_ID);
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uint32_t part_offset = paddr_base;
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esp_image_metadata_t image_data = {0};
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ret = process_image_header(&image_data, part_offset);
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if (ret != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "failed to process image header");
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abort();
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}
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ret = s_image_process_driver.process_segments(&image_data);
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if (ret != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "failed to process segments");
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return ESP_FAIL;
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}
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mmu_ll_set_entry_invalid(0, MMU_LL_END_DROM_ENTRY_ID);
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#else
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(void)s_image_process_driver;
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#endif
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return ESP_OK;
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}
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