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2c2a62e323
- Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32h2
10 lines
221 B
C
10 lines
221 B
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#define DR_REG_MODEM_SYSCON_BASE 0x600A5400
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#define DR_REG_MODEM_LPCON_BASE 0x600AD000
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