mirror of
https://github.com/espressif/esp-idf.git
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2fc9bd61bf
This commit refactors the ulp component. Files are now divided based on type of ulp, viz., fsm or risc-v. Files common to both are maintained in the ulp_common folder. This commit also adds menuconfig options for ULP within the ulp component instead of presenting target specific configuations for ulp.
141 lines
6.6 KiB
C
141 lines
6.6 KiB
C
/*
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* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#define ULP_RISCV_REGISTER_OPS
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#ifdef __cplusplus
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extern "C" {
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#endif
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//Registers Operation {{
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/*
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* When COCPU accesses the RTC register, it needs to convert the access address.
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* When COCPU accesses the RTC memory, dont need to convert the access address.
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*/
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#define WRITE_RTC_MEM(addr, val) (*((volatile int*)(addr))) = (int) (val)
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#define READ_RTC_MEM(addr) (*(volatile int*)(addr))
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/*
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* When COCPU accesses the RTC register, it needs to convert the access address.
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* When COCPU accesses the RTC memory, dont need to convert the access address.
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*/
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#define RISCV_REG_CONV(addr) (((addr&0xffff)<<3 & 0xe000) | (addr & 0x1fff) | 0x8000)
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#define ETS_UNCACHED_ADDR(addr) (RISCV_REG_CONV(addr))
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#ifndef __ASSEMBLER__
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#define BIT(nr) (1UL << (nr))
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#else
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#define BIT(nr) (1 << (nr))
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#endif
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//write value to register
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#define REG_WRITE(_r, _v) ({ \
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(*(volatile uint32_t *)RISCV_REG_CONV(_r)) = (_v); \
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})
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//read value from register
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#define REG_READ(_r) ({ \
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(*(volatile uint32_t *)RISCV_REG_CONV(_r)); \
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})
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//get bit or get bits from register
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#define REG_GET_BIT(_r, _b) ({ \
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(*(volatile uint32_t*)RISCV_REG_CONV(_r) & (_b)); \
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})
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//set bit or set bits to register
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#define REG_SET_BIT(_r, _b) ({ \
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(*(volatile uint32_t*)RISCV_REG_CONV(_r) |= (_b)); \
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})
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//clear bit or clear bits of register
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#define REG_CLR_BIT(_r, _b) ({ \
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(*(volatile uint32_t*)RISCV_REG_CONV(_r) &= ~(_b)); \
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})
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//set bits of register controlled by mask
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#define REG_SET_BITS(_r, _b, _m) ({ \
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(*(volatile uint32_t*)RISCV_REG_CONV(_r) = (*(volatile uint32_t*)RISCV_REG_CONV(_r) & ~(_m)) | ((_b) & (_m))); \
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})
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//get field from register, uses field _S & _V to determine mask
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#define REG_GET_FIELD(_r, _f) ({ \
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((REG_READ(_r) >> (_f##_S)) & (_f##_V)); \
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})
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//set field of a register from variable, uses field _S & _V to determine mask
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#define REG_SET_FIELD(_r, _f, _v) ({ \
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(REG_WRITE((_r),((REG_READ(_r) & ~((_f##_V) << (_f##_S)))|(((_v) & (_f##_V))<<(_f##_S))))); \
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})
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//get field value from a variable, used when _f is not left shifted by _f##_S
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#define VALUE_GET_FIELD(_r, _f) (((_r) >> (_f##_S)) & (_f))
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//get field value from a variable, used when _f is left shifted by _f##_S
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#define VALUE_GET_FIELD2(_r, _f) (((_r) & (_f))>> (_f##_S))
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//set field value to a variable, used when _f is not left shifted by _f##_S
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#define VALUE_SET_FIELD(_r, _f, _v) ((_r)=(((_r) & ~((_f) << (_f##_S)))|((_v)<<(_f##_S))))
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//set field value to a variable, used when _f is left shifted by _f##_S
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#define VALUE_SET_FIELD2(_r, _f, _v) ((_r)=(((_r) & ~(_f))|((_v)<<(_f##_S))))
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//generate a value from a field value, used when _f is not left shifted by _f##_S
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#define FIELD_TO_VALUE(_f, _v) (((_v)&(_f))<<_f##_S)
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//generate a value from a field value, used when _f is left shifted by _f##_S
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#define FIELD_TO_VALUE2(_f, _v) (((_v)<<_f##_S) & (_f))
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//read value from register
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#define READ_PERI_REG(addr) ({ \
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(*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))); \
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})
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//write value to register
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#define WRITE_PERI_REG(addr, val) ({ \
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(*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val); \
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})
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//clear bits of register controlled by mask
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#define CLEAR_PERI_REG_MASK(reg, mask) ({ \
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WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); \
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})
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//set bits of register controlled by mask
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#define SET_PERI_REG_MASK(reg, mask) ({ \
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WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); \
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})
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//get bits of register controlled by mask
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#define GET_PERI_REG_MASK(reg, mask) ({ \
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(READ_PERI_REG(reg) & (mask)); \
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})
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//get bits of register controlled by highest bit and lowest bit
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// #define GET_PERI_REG_BITS(reg, hipos,lowpos) ({
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// ASSERT_IF_DPORT_REG((reg), GET_PERI_REG_BITS);
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// ((READ_PERI_REG(reg)>>(lowpos))&((1UL<<((hipos)-(lowpos)+1))-1));
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// })
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#define GET_PERI_REG_BITS(reg, bit_map, shift) ((READ_PERI_REG(reg))&((bit_map)<<(shift)))>>shift
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//set bits of register controlled by mask and shift
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#define SET_PERI_REG_BITS(reg,bit_map,value,shift) ({ \
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(WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & bit_map)<<(shift)) )); \
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})
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//get field of register
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#define GET_PERI_REG_BITS2(reg, mask,shift) ({ \
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((READ_PERI_REG(reg)>>(shift))&(mask)); \
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})
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//}}
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#ifdef __cplusplus
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}
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#endif
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