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86 lines
3.1 KiB
C
86 lines
3.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/soc.h"
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#include "soc/soc_caps.h"
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#include "esp_attr.h"
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#include "hal/pau_hal.h"
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#include "hal/pau_types.h"
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#if SOC_PAU_IN_TOP_DOMAIN
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#include "hal/lp_sys_ll.h"
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#endif
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void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr)
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{
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pau_ll_set_regdma_link0_addr(hal->dev, (*link_addr)[0]);
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pau_ll_set_regdma_link1_addr(hal->dev, (*link_addr)[1]);
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pau_ll_set_regdma_link2_addr(hal->dev, (*link_addr)[2]);
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/* The link 3 of REGDMA is reserved, PMU state switching will not use
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* REGDMA link 3 */
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// When light sleep (PD_TOP), the PAU will power down. so need use LP_SYS_BACKUP_DMA_CFG2_REG
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// to store recover link address. We always use link0 as the default retention entry.
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lp_sys_ll_set_pau_link_addr((uint32_t)(*link_addr)[0]);
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}
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void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
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{
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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pau_ll_set_regdma_select_wifimac_link(hal->dev);
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pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore);
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pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev);
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while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
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}
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void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
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{
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pau_ll_set_regdma_wifimac_link_backup_start_disable(hal->dev);
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pau_ll_set_regdma_deselect_wifimac_link(hal->dev);
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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}
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void IRAM_ATTR pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_restore)
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{
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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/* The link 3 of REGDMA is reserved, it is used as software trigger REGDMA to backup and
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* restore, and is used by the UT to test module driver retention function.
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*/
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pau_ll_select_regdma_entry_link(hal->dev, 3);
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pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore);
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pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev);
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while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
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}
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void IRAM_ATTR pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
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{
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pau_ll_set_regdma_entry_link_backup_start_disable(hal->dev);
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pau_ll_select_regdma_entry_link(hal->dev, 3); /* restore link select to default */
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pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
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}
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void pau_hal_set_regdma_work_timeout(pau_hal_context_t *hal, uint32_t loop_num, uint32_t time)
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{
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}
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void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int interval)
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{
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HAL_ASSERT(count > 0 && interval > 0);
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pau_ll_set_regdma_link_wait_retry_count(hal->dev, count);
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pau_ll_set_regdma_link_wait_read_interval(hal->dev, interval);
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}
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#if SOC_PAU_IN_TOP_DOMAIN
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void IRAM_ATTR pau_hal_lp_sys_initialize(void)
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{
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lp_sys_ll_set_pau_aon_bypass(true);
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lp_sys_ll_set_pau_link_backup_tout_thres(300);
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lp_sys_ll_set_pau_link_tout_thres(200);
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lp_sys_ll_set_pau_reg_read_interval(50);
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}
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#endif
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