esp-idf/components/riscv/include
Sudeep Mohanty d4ca7c246e fix(freertos): Fixed incorrect int level restoration on esp32p4
This commit fixes a bug where in the portENABLE_INTERRUPTS() macro
incorrectly restored the interrupt level to 1 (non-CLIC controller).
2024-01-05 11:00:56 +01:00
..
esp_private fix(panic): fixed cache error being reported as illegal instruction 2023-12-04 10:49:00 +08:00
riscv fix(freertos): Fixed incorrect int level restoration on esp32p4 2024-01-05 11:00:56 +01:00