mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
2d44dc1eed
This commit gives basic mmu driver framework. Now it is able to maintain mmu virtual address usage on esp32, esp32s2 and esp32s3. Usage to external virtual address should rely on mmu functions to know which address range is available, instead of hardcoded. This commit also improves psram memory that is added to the heap allocator. Now it's added to the heap, according to the memory alignment. Closes https://github.com/espressif/esp-idf/issues/8295
212 lines
4.9 KiB
C
212 lines
4.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for MMU register operations
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#pragma once
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#include "soc/extmem_reg.h"
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#include "soc/ext_mem_defs.h"
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#include "hal/assert.h"
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#include "hal/mmu_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Convert MMU virtual address to linear address
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*
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* @param vaddr virtual address
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*
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* @return linear address
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*/
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static inline uint32_t mmu_ll_vaddr_to_laddr(uint32_t vaddr)
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{
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return vaddr & SOC_MMU_LINEAR_ADDR_MASK;
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}
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/**
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* Convert MMU linear address to virtual address
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*
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* @param laddr linear address
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* @param vaddr_type virtual address type, could be instruction type or data type. See `mmu_vaddr_t`
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*
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* @return virtual address
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*/
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static inline uint32_t mmu_ll_laddr_to_vaddr(uint32_t laddr, mmu_vaddr_t vaddr_type)
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{
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uint32_t vaddr_base = 0;
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if (vaddr_type == MMU_VADDR_DATA) {
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vaddr_base = SOC_MMU_DBUS_VADDR_BASE;
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} else {
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vaddr_base = SOC_MMU_IBUS_VADDR_BASE;
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}
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return vaddr_base | laddr;
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}
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/**
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* Get MMU page size
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*
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* @param mmu_id MMU ID
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*
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* @return MMU page size code
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*/
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__attribute__((always_inline))
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static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id)
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{
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//On esp32s3, MMU Page size is always 64KB
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(void)mmu_id;
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return MMU_PAGE_64KB;
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}
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/**
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* Set MMU page size
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*
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* @param size MMU page size
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*
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* @note On esp32s3, only supports `MMU_PAGE_64KB`
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_set_page_size(uint32_t mmu_id, uint32_t size)
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{
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HAL_ASSERT(size == MMU_PAGE_64KB);
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}
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/**
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* Check if the external memory vaddr region is valid
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*
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* @param mmu_id MMU ID
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* @param vaddr_start start of the virtual address
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* @param len length, in bytes
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*
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* @return
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* True for valid
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*/
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__attribute__((always_inline))
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static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len)
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{
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(void)mmu_id;
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uint32_t vaddr_end = vaddr_start + len - 1;
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return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end));
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}
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/**
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* To get the MMU table entry id to be mapped
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*
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* @param mmu_id MMU ID
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* @param vaddr virtual address to be mapped
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*
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* @return
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* MMU table entry id
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*/
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__attribute__((always_inline))
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static inline uint32_t mmu_ll_get_entry_id(uint32_t mmu_id, uint32_t vaddr)
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{
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(void)mmu_id;
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return ((vaddr & MMU_VADDR_MASK) >> 16);
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}
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/**
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* Format the paddr to be mappable
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*
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* @param mmu_id MMU ID
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* @param paddr physical address to be mapped
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*
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* @return
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* mmu_val - paddr in MMU table supported format
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*/
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__attribute__((always_inline))
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static inline uint32_t mmu_ll_format_paddr(uint32_t mmu_id, uint32_t paddr)
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{
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(void)mmu_id;
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return paddr >> 16;
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}
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/**
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* Write to the MMU table to map the virtual memory and the physical memory
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*
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* @param mmu_id MMU ID
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* @param entry_id MMU entry ID
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* @param mmu_val Value to be set into an MMU entry, for physical address
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* @param target MMU target physical memory.
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_write_entry(uint32_t mmu_id, uint32_t entry_id, uint32_t mmu_val, mmu_target_t target)
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{
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(void)mmu_id;
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HAL_ASSERT(entry_id < MMU_ENTRY_NUM);
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uint32_t target_code = (target == MMU_TARGET_FLASH0) ? MMU_ACCESS_FLASH : MMU_ACCESS_SPIRAM;
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*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = mmu_val | target_code | MMU_VALID;
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}
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/**
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* Read the raw value from MMU table
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*
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* @param mmu_id MMU ID
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* @param entry_id MMU entry ID
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* @param mmu_val Value to be read from MMU table
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*/
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__attribute__((always_inline))
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static inline uint32_t mmu_ll_read_entry(uint32_t mmu_id, uint32_t entry_id)
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{
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(void)mmu_id;
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HAL_ASSERT(entry_id < MMU_ENTRY_NUM);
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return *(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4);
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}
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/**
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* Set MMU table entry as invalid
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*
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* @param mmu_id MMU ID
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* @param entry_id MMU entry ID
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_set_entry_invalid(uint32_t mmu_id, uint32_t entry_id)
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{
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(void)mmu_id;
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HAL_ASSERT(entry_id < MMU_ENTRY_NUM);
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*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) = MMU_INVALID;
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}
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/**
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* Unmap all the items in the MMU table
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*
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* @param mmu_id MMU ID
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*/
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__attribute__((always_inline))
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static inline void mmu_ll_unmap_all(uint32_t mmu_id)
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{
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for (int i = 0; i < MMU_ENTRY_NUM; i++) {
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mmu_ll_set_entry_invalid(mmu_id, i);
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}
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}
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/**
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* Get MMU table entry is invalid
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*
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* @param mmu_id MMU ID
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* @param entry_id MMU entry ID
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* return ture for MMU entry is invalid, false for valid
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*/
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__attribute__((always_inline))
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static inline bool mmu_ll_get_entry_is_invalid(uint32_t mmu_id, uint32_t entry_id)
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{
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(void)mmu_id;
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HAL_ASSERT(entry_id < MMU_ENTRY_NUM);
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return (*(uint32_t *)(DR_REG_MMU_TABLE + entry_id * 4) & MMU_INVALID) ? true : false;
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}
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#ifdef __cplusplus
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}
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#endif
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