mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
1d55f12c2d
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable 2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
301 lines
9.7 KiB
C
301 lines
9.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_attr.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "soc/syscon_reg.h"
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#include "soc/dport_access.h"
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static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return SYSTEM_APB_SARADC_CLK_EN;
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case PERIPH_RMT_MODULE:
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return SYSTEM_RMT_CLK_EN;
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case PERIPH_LEDC_MODULE:
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return SYSTEM_LEDC_CLK_EN;
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case PERIPH_UART0_MODULE:
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return SYSTEM_UART_CLK_EN;
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case PERIPH_UART1_MODULE:
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return SYSTEM_UART1_CLK_EN;
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case PERIPH_UART2_MODULE:
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return SYSTEM_UART2_CLK_EN;
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case PERIPH_USB_MODULE:
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return SYSTEM_USB_CLK_EN;
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case PERIPH_I2C0_MODULE:
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return SYSTEM_I2C_EXT0_CLK_EN;
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case PERIPH_I2C1_MODULE:
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return SYSTEM_I2C_EXT1_CLK_EN;
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case PERIPH_I2S0_MODULE:
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return SYSTEM_I2S0_CLK_EN;
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case PERIPH_I2S1_MODULE:
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return SYSTEM_I2S1_CLK_EN;
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case PERIPH_LCD_CAM_MODULE:
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return SYSTEM_LCD_CAM_CLK_EN;
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case PERIPH_TIMG0_MODULE:
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return SYSTEM_TIMERGROUP_CLK_EN;
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case PERIPH_TIMG1_MODULE:
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return SYSTEM_TIMERGROUP1_CLK_EN;
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case PERIPH_PWM0_MODULE:
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return SYSTEM_PWM0_CLK_EN;
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case PERIPH_PWM1_MODULE:
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return SYSTEM_PWM1_CLK_EN;
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case PERIPH_UHCI0_MODULE:
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return SYSTEM_UHCI0_CLK_EN;
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case PERIPH_UHCI1_MODULE:
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return SYSTEM_UHCI1_CLK_EN;
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case PERIPH_PCNT_MODULE:
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return SYSTEM_PCNT_CLK_EN;
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case PERIPH_SPI_MODULE:
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return SYSTEM_SPI01_CLK_EN;
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case PERIPH_SPI2_MODULE:
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return SYSTEM_SPI2_CLK_EN;
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case PERIPH_SPI3_MODULE:
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return SYSTEM_SPI3_CLK_EN;
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case PERIPH_SDMMC_MODULE:
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return SYSTEM_SDIO_HOST_CLK_EN;
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case PERIPH_TWAI_MODULE:
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return SYSTEM_TWAI_CLK_EN;
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case PERIPH_RNG_MODULE:
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return SYSTEM_WIFI_CLK_RNG_EN;
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case PERIPH_WIFI_MODULE:
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return SYSTEM_WIFI_CLK_WIFI_EN_M;
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case PERIPH_BT_MODULE:
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return SYSTEM_WIFI_CLK_BT_EN_M;
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case PERIPH_WIFI_BT_COMMON_MODULE:
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return SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M;
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case PERIPH_BT_BASEBAND_MODULE:
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return SYSTEM_BT_BASEBAND_EN;
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case PERIPH_BT_LC_MODULE:
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return SYSTEM_BT_LC_EN;
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case PERIPH_SYSTIMER_MODULE:
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return SYSTEM_SYSTIMER_CLK_EN;
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case PERIPH_DEDIC_GPIO_MODULE:
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return SYSTEM_CLK_EN_DEDICATED_GPIO;
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case PERIPH_GDMA_MODULE:
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return SYSTEM_DMA_CLK_EN;
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case PERIPH_AES_MODULE:
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return SYSTEM_CRYPTO_AES_CLK_EN;
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case PERIPH_SHA_MODULE:
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return SYSTEM_CRYPTO_SHA_CLK_EN;
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case PERIPH_RSA_MODULE:
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return SYSTEM_CRYPTO_RSA_CLK_EN;
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case PERIPH_HMAC_MODULE:
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return SYSTEM_CRYPTO_HMAC_CLK_EN;
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case PERIPH_DS_MODULE:
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return SYSTEM_CRYPTO_DS_CLK_EN;
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default:
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return 0;
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}
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}
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static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable)
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{
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switch (periph) {
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case PERIPH_SARADC_MODULE:
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return SYSTEM_APB_SARADC_RST;
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case PERIPH_RMT_MODULE:
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return SYSTEM_RMT_RST;
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case PERIPH_LEDC_MODULE:
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return SYSTEM_LEDC_RST;
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case PERIPH_BT_MODULE:
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return (SYSTEM_BTBB_RST | SYSTEM_BTBB_REG_RST | SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_RW_BTMAC_REG_RST | SYSTEM_RW_BTLP_REG_RST);
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case PERIPH_UART0_MODULE:
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return SYSTEM_UART_RST;
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case PERIPH_UART1_MODULE:
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return SYSTEM_UART1_RST;
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case PERIPH_UART2_MODULE:
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return SYSTEM_UART2_RST;
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case PERIPH_USB_MODULE:
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return SYSTEM_USB_RST;
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case PERIPH_I2C0_MODULE:
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return SYSTEM_I2C_EXT0_RST;
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case PERIPH_I2C1_MODULE:
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return SYSTEM_I2C_EXT1_RST;
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case PERIPH_I2S0_MODULE:
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return SYSTEM_I2S0_RST;
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case PERIPH_I2S1_MODULE:
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return SYSTEM_I2S1_RST;
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case PERIPH_LCD_CAM_MODULE:
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return SYSTEM_LCD_CAM_RST;
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case PERIPH_TIMG0_MODULE:
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return SYSTEM_TIMERGROUP_RST;
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case PERIPH_TIMG1_MODULE:
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return SYSTEM_TIMERGROUP1_RST;
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case PERIPH_PWM0_MODULE:
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return SYSTEM_PWM0_RST;
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case PERIPH_PWM1_MODULE:
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return SYSTEM_PWM1_RST;
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case PERIPH_UHCI0_MODULE:
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return SYSTEM_UHCI0_RST;
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case PERIPH_UHCI1_MODULE:
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return SYSTEM_UHCI1_RST;
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case PERIPH_PCNT_MODULE:
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return SYSTEM_PCNT_RST;
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case PERIPH_SPI_MODULE:
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return SYSTEM_SPI01_RST;
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case PERIPH_SPI2_MODULE:
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return SYSTEM_SPI2_RST;
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case PERIPH_SPI3_MODULE:
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return SYSTEM_SPI3_RST;
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case PERIPH_SDMMC_MODULE:
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return SYSTEM_SDIO_HOST_RST;
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case PERIPH_TWAI_MODULE:
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return SYSTEM_TWAI_RST;
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case PERIPH_SYSTIMER_MODULE:
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return SYSTEM_SYSTIMER_RST;
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case PERIPH_DEDIC_GPIO_MODULE:
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return SYSTEM_RST_EN_DEDICATED_GPIO;
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case PERIPH_GDMA_MODULE:
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return SYSTEM_DMA_RST;
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case PERIPH_HMAC_MODULE:
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return SYSTEM_CRYPTO_HMAC_RST;
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case PERIPH_DS_MODULE:
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return SYSTEM_CRYPTO_DS_RST;
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case PERIPH_AES_MODULE:
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if (enable == true) {
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// Clear reset on digital signature, otherwise AES unit is held in reset also.
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return (SYSTEM_CRYPTO_AES_RST | SYSTEM_CRYPTO_DS_RST);
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} else {
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//Don't return other units to reset, as this pulls reset on RSA & SHA units, respectively.
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return SYSTEM_CRYPTO_AES_RST;
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}
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case PERIPH_SHA_MODULE:
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if (enable == true) {
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// Clear reset on digital signature and HMAC, otherwise SHA is held in reset
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return (SYSTEM_CRYPTO_SHA_RST | SYSTEM_CRYPTO_DS_RST | SYSTEM_CRYPTO_HMAC_RST) ;
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} else {
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// Don't assert reset on secure boot, otherwise AES is held in reset
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return SYSTEM_CRYPTO_SHA_RST;
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}
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case PERIPH_RSA_MODULE:
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if (enable == true) {
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/* also clear reset on digital signature, otherwise RSA is held in reset */
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return (SYSTEM_CRYPTO_RSA_RST | SYSTEM_CRYPTO_DS_RST);
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} else {
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/* don't reset digital signature unit, as this resets AES also */
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return SYSTEM_CRYPTO_RSA_RST;
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}
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default:
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return 0;
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}
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}
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static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_DEDIC_GPIO_MODULE:
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return SYSTEM_CPU_PERI_CLK_EN_REG;
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case PERIPH_RNG_MODULE:
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case PERIPH_WIFI_MODULE:
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case PERIPH_BT_MODULE:
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case PERIPH_WIFI_BT_COMMON_MODULE:
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case PERIPH_BT_BASEBAND_MODULE:
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case PERIPH_BT_LC_MODULE:
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return SYSTEM_WIFI_CLK_EN_REG ;
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case PERIPH_UART2_MODULE:
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case PERIPH_SDMMC_MODULE:
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case PERIPH_LCD_CAM_MODULE:
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case PERIPH_GDMA_MODULE:
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case PERIPH_HMAC_MODULE:
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case PERIPH_DS_MODULE:
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case PERIPH_AES_MODULE:
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case PERIPH_SHA_MODULE:
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case PERIPH_RSA_MODULE:
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return SYSTEM_PERIP_CLK_EN1_REG;
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default:
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return SYSTEM_PERIP_CLK_EN0_REG;
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}
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}
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static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
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{
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switch (periph) {
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case PERIPH_DEDIC_GPIO_MODULE:
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return SYSTEM_CPU_PERI_RST_EN_REG;
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case PERIPH_RNG_MODULE:
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case PERIPH_WIFI_MODULE:
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case PERIPH_BT_MODULE:
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case PERIPH_WIFI_BT_COMMON_MODULE:
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case PERIPH_BT_BASEBAND_MODULE:
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case PERIPH_BT_LC_MODULE:
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return SYSTEM_CORE_RST_EN_REG;
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case PERIPH_UART2_MODULE:
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case PERIPH_SDMMC_MODULE:
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case PERIPH_LCD_CAM_MODULE:
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case PERIPH_GDMA_MODULE:
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case PERIPH_HMAC_MODULE:
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case PERIPH_DS_MODULE:
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case PERIPH_AES_MODULE:
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case PERIPH_SHA_MODULE:
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case PERIPH_RSA_MODULE:
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return SYSTEM_PERIP_RST_EN1_REG;
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default:
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return SYSTEM_PERIP_RST_EN0_REG;
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}
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}
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static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph)
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{
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DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph));
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DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, true));
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}
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static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
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{
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DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph));
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DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
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}
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static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
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{
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DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
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DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
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}
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static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
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{
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DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
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DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
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}
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static inline void periph_ll_reset(periph_module_t periph)
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{
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DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
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DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
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}
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static inline bool IRAM_ATTR periph_ll_periph_enabled(periph_module_t periph)
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{
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return DPORT_REG_GET_BIT(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)) == 0 &&
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DPORT_REG_GET_BIT(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)) != 0;
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}
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static inline void periph_ll_wifi_module_enable_clk_clear_rst(void)
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{
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DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M);
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DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
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}
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static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
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{
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DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M);
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DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
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}
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#ifdef __cplusplus
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}
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#endif
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