mirror of
https://github.com/espressif/esp-idf.git
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c7a02cbe55
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage See merge request espressif/esp-idf!27696
307 lines
8.9 KiB
C
307 lines
8.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_check.h"
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#include "esp_system.h"
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#include "esp_log.h"
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#include "esp_heap_caps_init.h"
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#include "spi_flash_mmap.h"
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#include "esp_flash_internal.h"
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#include "esp_newlib.h"
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#include "esp_efuse.h"
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#include "esp_efuse_table.h"
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#include "esp_flash_encrypt.h"
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#include "esp_partition.h"
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#include "esp_secure_boot.h"
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#include "esp_xt_wdt.h"
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#include "esp_cpu.h"
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#include "esp_private/startup_internal.h"
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#include "soc/soc_caps.h"
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#include "hal/wdt_hal.h"
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#include "hal/uart_types.h"
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#include "hal/uart_ll.h"
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#include "hal/efuse_hal.h"
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#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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#include "private/esp_coexist_internal.h"
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#endif
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#if __has_include("esp_app_desc.h")
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#include "esp_app_desc.h"
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#endif
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#if CONFIG_PM_ENABLE
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#include "esp_pm.h"
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#include "esp_private/pm_impl.h"
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#endif
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#include "esp_private/esp_clk.h"
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#include "esp_private/spi_flash_os.h"
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#include "esp_private/brownout.h"
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#include "esp_rom_caps.h"
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#include "esp_rom_sys.h"
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#if SOC_BOD_SUPPORTED
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#include "hal/brownout_ll.h"
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#endif
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#if CONFIG_SPIRAM
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#include "esp_psram.h"
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#include "esp_private/esp_psram_extram.h"
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#endif
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// Using the same tag as in startup.c to keep the logs unchanged
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static const char* TAG = "cpu_start";
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// Hook to force the linker to include this file
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void esp_system_include_startup_funcs(void)
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{
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}
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// [refactor-todo] Most of these init functions should be moved to the respective components.
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ESP_SYSTEM_INIT_FN(init_show_cpu_freq, CORE, BIT(0), 10)
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{
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ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
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int cpu_freq = esp_clk_cpu_freq();
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ESP_EARLY_LOGI(TAG, "cpu freq: %d Hz", cpu_freq);
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return ESP_OK;
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}
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ESP_SYSTEM_INIT_FN(init_heap, CORE, BIT(0), 100)
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{
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heap_caps_init();
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return ESP_OK;
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}
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ESP_SYSTEM_INIT_FN(init_psram_heap, CORE, BIT(0), 103)
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{
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#if CONFIG_SPIRAM_BOOT_INIT && (CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC)
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if (esp_psram_is_initialized()) {
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esp_err_t r = esp_psram_extram_add_to_heap_allocator();
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if (r != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "External RAM could not be added to heap!");
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abort();
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}
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#if CONFIG_SPIRAM_USE_MALLOC
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heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL);
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#endif
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}
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#endif
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return ESP_OK;
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}
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ESP_SYSTEM_INIT_FN(init_brownout, CORE, BIT(0), 104)
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{
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// [refactor-todo] leads to call chain rtc_is_register (driver) -> esp_intr_alloc (esp32/esp32s2) ->
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// malloc (newlib) -> heap_caps_malloc (heap), so heap must be at least initialized
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#if CONFIG_ESP_BROWNOUT_DET
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esp_brownout_init();
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#else
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#if SOC_CAPS_NO_RESET_BY_ANA_BOD
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brownout_ll_ana_reset_enable(false);
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#endif // SOC_CAPS_NO_RESET_BY_ANA_BOD
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#endif // CONFIG_ESP_BROWNOUT_DET
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return ESP_OK;
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}
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ESP_SYSTEM_INIT_FN(init_newlib_time, CORE, BIT(0), 105)
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{
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esp_newlib_time_init();
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return ESP_OK;
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}
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#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
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ESP_SYSTEM_INIT_FN(init_flash, CORE, BIT(0), 130)
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{
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#if CONFIG_SPI_FLASH_ROM_IMPL
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spi_flash_rom_impl_init();
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#endif
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esp_flash_app_init();
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esp_err_t flash_ret = esp_flash_init_default_chip();
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assert(flash_ret == ESP_OK);
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(void)flash_ret;
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#if CONFIG_SPI_FLASH_BROWNOUT_RESET
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spi_flash_needs_reset_check();
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#endif // CONFIG_SPI_FLASH_BROWNOUT_RESET
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return ESP_OK;
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}
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#endif // !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
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#ifdef CONFIG_EFUSE_VIRTUAL
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ESP_SYSTEM_INIT_FN(init_virtual_efuse, CORE, BIT(0), 140)
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{
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ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
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#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
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const esp_partition_t *efuse_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_EFUSE_EM, NULL);
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if (efuse_partition) {
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esp_efuse_init_virtual_mode_in_flash(efuse_partition->address, efuse_partition->size);
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}
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#endif
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return ESP_OK;
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}
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#endif // CONFIG_EFUSE_VIRTUAL
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ESP_SYSTEM_INIT_FN(init_secure, CORE, BIT(0), 150)
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{
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#if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
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// For anti-rollback case, recheck security version before we boot-up the current application
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const esp_app_desc_t *desc = esp_app_get_description();
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ESP_RETURN_ON_FALSE(esp_efuse_check_secure_version(desc->secure_version), ESP_FAIL, TAG, "Incorrect secure version of app");
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#endif
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#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
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esp_flash_encryption_init_checks();
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#endif
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#if defined(CONFIG_SECURE_BOOT) || defined(CONFIG_SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT)
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// Note: in some configs this may read flash, so placed after flash init
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esp_secure_boot_init_checks();
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#endif
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#if SOC_EFUSE_ECDSA_USE_HARDWARE_K
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if (esp_efuse_find_purpose(ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY, NULL)) {
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// ECDSA key purpose block is present and hence permanently enable
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// the hardware TRNG supplied k mode (most secure mode)
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ESP_RETURN_ON_ERROR(esp_efuse_write_field_bit(ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K), TAG, "Failed to enable hardware k mode");
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}
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#endif
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#if CONFIG_SECURE_DISABLE_ROM_DL_MODE
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ESP_RETURN_ON_ERROR(esp_efuse_disable_rom_download_mode(), TAG, "Failed to disable ROM download mode");
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#endif
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#if CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE
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ESP_RETURN_ON_ERROR(esp_efuse_enable_rom_secure_download_mode(), TAG, "Failed to enable Secure Download mode");
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#endif
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#if CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE
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esp_efuse_disable_basic_rom_console();
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#endif
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return ESP_OK;
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}
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// Set efuse ROM_LOG_MODE on first boot
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//
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// For CONFIG_BOOT_ROM_LOG_ALWAYS_ON (default) or undefined (ESP32), leave
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// ROM_LOG_MODE undefined (no need to call this function during startup)
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#if CONFIG_BOOT_ROM_LOG_ALWAYS_OFF
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#define ROM_LOG_MODE ESP_EFUSE_ROM_LOG_ALWAYS_OFF
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#elif CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW
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#define ROM_LOG_MODE ESP_EFUSE_ROM_LOG_ON_GPIO_LOW
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#elif CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH
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#define ROM_LOG_MODE ESP_EFUSE_ROM_LOG_ON_GPIO_HIGH
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#endif
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#ifdef ROM_LOG_MODE
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ESP_SYSTEM_INIT_FN(init_rom_log, CORE, BIT(0), 160)
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{
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if (ets_efuse_get_uart_print_control() == ROM_LOG_MODE) {
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return ESP_OK;
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}
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esp_err_t err = esp_efuse_set_rom_log_scheme(ROM_LOG_MODE);
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if (err == ESP_ERR_NOT_SUPPORTED) {
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err = ESP_OK;
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}
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ESP_RETURN_ON_ERROR(err, TAG, "Failed to set ROM log scheme");
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return ESP_OK;
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}
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#endif // ROM_LOG_MODE
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#if CONFIG_ESP_XT_WDT
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ESP_SYSTEM_INIT_FN(init_xt_wdt, CORE, BIT(0), 170)
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{
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esp_xt_wdt_config_t cfg = {
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.timeout = CONFIG_ESP_XT_WDT_TIMEOUT,
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.auto_backup_clk_enable = CONFIG_ESP_XT_WDT_BACKUP_CLK_ENABLE,
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};
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return esp_xt_wdt_init(&cfg);
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}
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#endif // CONFIG_ESP_XT_WDT
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#if CONFIG_PM_ENABLE
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ESP_SYSTEM_INIT_FN(init_pm, SECONDARY, BIT(0), 201)
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{
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esp_pm_impl_init();
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return ESP_OK;
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}
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#endif // CONFIG_PM_ENABLE
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#if SOC_APB_BACKUP_DMA
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ESP_SYSTEM_INIT_FN(init_apb_dma, SECONDARY, BIT(0), 203)
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{
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extern void esp_apb_backup_dma_lock_init(void);
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esp_apb_backup_dma_lock_init();
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return ESP_OK;
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}
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#endif
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#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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ESP_SYSTEM_INIT_FN(init_coexist, SECONDARY, BIT(0), 204)
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{
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esp_coex_adapter_register(&g_coex_adapter_funcs);
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coex_pre_init();
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return ESP_OK;
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}
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#endif // CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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#ifdef CONFIG_COMPILER_CXX_EXCEPTIONS
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/**
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* This function overwrites a the same function of libsupc++ (part of libstdc++).
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* Consequently, libsupc++ will then follow our configured exception emergency pool size.
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*
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* It will be called even with -fno-exception for user code since the stdlib still uses exceptions.
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*/
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size_t __cxx_eh_arena_size_get(void)
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{
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#ifdef CONFIG_COMPILER_CXX_EXCEPTIONS
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return CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE;
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#else
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return 0;
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#endif
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}
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// workaround for C++ exception crashes
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void _Unwind_SetNoFunctionContextInstall(unsigned char enable) __attribute__((weak, alias("_Unwind_SetNoFunctionContextInstall_Default")));
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// workaround for C++ exception large memory allocation
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void _Unwind_SetEnableExceptionFdeSorting(unsigned char enable);
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static IRAM_ATTR void _Unwind_SetNoFunctionContextInstall_Default(unsigned char enable __attribute__((unused)))
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{
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(void)0;
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}
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ESP_SYSTEM_INIT_FN(init_cxx_exceptions, SECONDARY, BIT(0), 205)
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{
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ESP_EARLY_LOGD(TAG, "Setting C++ exception workarounds.");
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_Unwind_SetNoFunctionContextInstall(1);
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_Unwind_SetEnableExceptionFdeSorting(0);
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return ESP_OK;
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}
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#endif // CONFIG_COMPILER_CXX_EXCEPTIONS
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#ifndef CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE
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ESP_SYSTEM_INIT_FN(init_disable_rtc_wdt, SECONDARY, BIT(0), 999)
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{
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wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT();
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wdt_hal_write_protect_disable(&rtc_wdt_ctx);
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wdt_hal_disable(&rtc_wdt_ctx);
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wdt_hal_write_protect_enable(&rtc_wdt_ctx);
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return ESP_OK;
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}
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#endif // CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE
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