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46dc36233a
For RISCV, backtrace generation on device is not possible without including and parsing DWARF sections. We extract the crash task stack and let the host generate the backtrace
117 lines
4.3 KiB
Plaintext
117 lines
4.3 KiB
Plaintext
menu "Core dump"
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choice ESP_COREDUMP_TO_FLASH_OR_UART
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prompt "Data destination"
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default ESP_COREDUMP_ENABLE_TO_NONE
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help
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Select place to store core dump: flash, uart or none (to disable core dumps generation).
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Core dumps to Flash are not available if PSRAM is used for task stacks.
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If core dump is configured to be stored in flash and custom partition table is used add
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corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
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in the components/partition_table directory.
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config ESP_COREDUMP_ENABLE_TO_FLASH
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bool "Flash"
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depends on !SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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select ESP_COREDUMP_ENABLE
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config ESP_COREDUMP_ENABLE_TO_UART
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bool "UART"
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select ESP_COREDUMP_ENABLE
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config ESP_COREDUMP_ENABLE_TO_NONE
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bool "None"
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endchoice
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choice ESP_COREDUMP_DATA_FORMAT
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prompt "Core dump data format"
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default ESP_COREDUMP_DATA_FORMAT_ELF
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depends on !ESP_COREDUMP_ENABLE_TO_NONE
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help
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Select the data format for core dump.
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config ESP_COREDUMP_DATA_FORMAT_BIN
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bool "Binary format"
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config ESP_COREDUMP_DATA_FORMAT_ELF
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bool "ELF format"
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endchoice
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choice ESP_COREDUMP_CHECKSUM
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prompt "Core dump data integrity check"
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default ESP_COREDUMP_CHECKSUM_CRC32
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depends on !ESP_COREDUMP_ENABLE_TO_NONE
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help
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Select the integrity check for the core dump.
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config ESP_COREDUMP_CHECKSUM_CRC32
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bool "Use CRC32 for integrity verification"
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config ESP_COREDUMP_CHECKSUM_SHA256
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bool "Use SHA256 for integrity verification"
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depends on ESP_COREDUMP_DATA_FORMAT_ELF && IDF_TARGET_ESP32
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endchoice
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config ESP_COREDUMP_CHECK_BOOT
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bool "Check core dump data integrity on boot"
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default y
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depends on ESP_COREDUMP_ENABLE_TO_FLASH
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help
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When enabled, if any data are found on the flash core dump partition,
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they will be checked by calculating their checksum.
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config ESP_COREDUMP_ENABLE
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bool
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default F
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help
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Enables/disable core dump module.
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config ESP_COREDUMP_MAX_TASKS_NUM
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int "Maximum number of tasks"
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depends on ESP_COREDUMP_ENABLE
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default 64
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help
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Maximum number of tasks snapshots in core dump.
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config ESP_COREDUMP_UART_DELAY
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int "Delay before print to UART"
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depends on ESP_COREDUMP_ENABLE_TO_UART
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default 0
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help
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Config delay (in ms) before printing core dump to UART.
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Delay can be interrupted by pressing Enter key.
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config ESP_COREDUMP_STACK_SIZE
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int "Reserved stack size"
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depends on ESP_COREDUMP_ENABLE
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# Temporarily disable this feature on Xtensa boards as switching stack
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# pointer triggers an exception (IDF-2797)
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depends on IDF_TARGET_ARCH_RISCV
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default 0
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help
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Size of the memory to be reserved for core dump stack. If 0 core dump process will run on
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the stack of crashed task/ISR, otherwise special stack will be allocated.
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To ensure that core dump itself will not overflow task/ISR stack set this to the value above 800.
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NOTE: It eats DRAM.
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config ESP_COREDUMP_SUMMARY_STACKDUMP_SIZE
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int "Size of the stack dump buffer"
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depends on ESP_COREDUMP_DATA_FORMAT_ELF && ESP_COREDUMP_ENABLE_TO_FLASH && IDF_TARGET_ARCH_RISCV
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range 512 4096
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default 1024
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help
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Size of the buffer that would be reserved for extracting backtrace info summary.
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This buffer will contain the stack dump of the crashed task. This dump is useful in generating backtrace
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choice ESP_COREDUMP_DECODE
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prompt "Handling of UART core dumps in IDF Monitor"
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depends on ESP_COREDUMP_ENABLE_TO_UART
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config ESP_COREDUMP_DECODE_INFO
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bool "Decode and show summary (info_corefile)"
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config ESP_COREDUMP_DECODE_DISABLE
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bool "Don't decode"
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endchoice
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config ESP_COREDUMP_DECODE
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string
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default "disable" if ESP_COREDUMP_DECODE_DISABLE
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default "info" if ESP_COREDUMP_DECODE_INFO
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endmenu
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