mirror of
https://github.com/espressif/esp-idf.git
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429 lines
13 KiB
C
429 lines
13 KiB
C
/**
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Group: Configuration Register */
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/** Type of external_device_encrypt_decrypt_control register
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* EXTERNAL DEVICE ENCRYPTION/DECRYPTION configuration register
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*/
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typedef union {
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struct {
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/** enable_spi_manual_encrypt : R/W; bitpos: [0]; default: 0;
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* Set this bit as 1 to enable mspi xts manual encrypt in spi boot mode.
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*/
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uint32_t enable_spi_manual_encrypt:1;
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/** enable_download_db_encrypt : R/W; bitpos: [1]; default: 0;
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* reserved
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*/
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uint32_t enable_download_db_encrypt:1;
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/** enable_download_g0cb_decrypt : R/W; bitpos: [2]; default: 0;
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* Set this bit as 1 to enable mspi xts auto decrypt in download boot mode.
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*/
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uint32_t enable_download_g0cb_decrypt:1;
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/** enable_download_manual_encrypt : R/W; bitpos: [3]; default: 0;
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* Set this bit as 1 to enable mspi xts manual encrypt in download boot mode.
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*/
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uint32_t enable_download_manual_encrypt:1;
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uint32_t reserved_4:28;
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};
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uint32_t val;
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} hp_sys_external_device_encrypt_decrypt_control_reg_t;
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/** Type of sram_usage_conf register
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* HP memory usage configuration register
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*/
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typedef union {
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struct {
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uint32_t reserved_0:8;
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/** sram_usage : R/W; bitpos: [11:8]; default: 0;
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* 0: cpu use hp-memory. 1:mac-dump accessing hp-memory.
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*/
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uint32_t sram_usage:4;
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uint32_t reserved_12:4;
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/** mac_dump_alloc : R/W; bitpos: [16]; default: 0;
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* Set this bit as 1 to add an offset (64KB) when mac-dump accessing hp-memory.
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*/
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uint32_t mac_dump_alloc:1;
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uint32_t reserved_17:15;
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};
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uint32_t val;
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} hp_sys_sram_usage_conf_reg_t;
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/** Type of sec_dpa_conf register
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* HP anti-DPA security configuration register
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*/
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typedef union {
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struct {
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/** sec_dpa_level : R/W; bitpos: [1:0]; default: 0;
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* 0: anti-DPA disable. 1~3: anti-DPA enable with different security level. The larger
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* the number, the stronger the ability to resist DPA attacks and the higher the
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* security level, but it will increase the computational overhead of the hardware
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* crypto-accelerators. Only avaliable if HP_SYS_SEC_DPA_CFG_SEL is 0.
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*/
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uint32_t sec_dpa_level:2;
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/** sec_dpa_cfg_sel : R/W; bitpos: [2]; default: 0;
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* This field is used to select either HP_SYS_SEC_DPA_LEVEL or EFUSE_SEC_DPA_LEVEL
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* (from efuse) to control dpa_level. 0: EFUSE_SEC_DPA_LEVEL, 1: HP_SYS_SEC_DPA_LEVEL.
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*/
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uint32_t sec_dpa_cfg_sel:1;
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uint32_t reserved_3:29;
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};
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uint32_t val;
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} hp_sys_sec_dpa_conf_reg_t;
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/** Type of sdio_ctrl register
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* SDIO Control configuration register
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*/
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typedef union {
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struct {
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/** dis_sdio_prob : R/W; bitpos: [0]; default: 1;
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* Set this bit as 1 to disable SDIO_PROB function. disable by default.
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*/
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uint32_t dis_sdio_prob:1;
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/** sdio_win_access_en : R/W; bitpos: [1]; default: 1;
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* Enable sdio slave to access other peripherals on the chip
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*/
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uint32_t sdio_win_access_en:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} hp_sys_sdio_ctrl_reg_t;
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/** Type of rom_table_lock register
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* Rom-Table lock register
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*/
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typedef union {
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struct {
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/** rom_table_lock : R/W; bitpos: [0]; default: 0;
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* XXXX
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*/
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uint32_t rom_table_lock:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} hp_sys_rom_table_lock_reg_t;
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/** Type of rom_table register
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* Rom-Table register
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*/
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typedef union {
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struct {
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/** rom_table : R/W; bitpos: [31:0]; default: 0;
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* XXXX
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*/
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uint32_t rom_table:32;
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};
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uint32_t val;
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} hp_sys_rom_table_reg_t;
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/** Type of core_debug_runstall_conf register
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* Core Debug runstall configure register
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*/
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typedef union {
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struct {
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/** core_debug_runstall_enable : R/W; bitpos: [0]; default: 0;
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* Set this field to 1 to enable debug runstall feature between HP-core and LP-core.
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*/
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uint32_t core_debug_runstall_enable:1;
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/** core_runstalled : RO; bitpos: [1]; default: 0;
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* Software can read this field to get the runstall status of hp-core. 1: stalled, 0:
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* not stalled.
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*/
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uint32_t core_runstalled:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} hp_sys_core_debug_runstall_conf_reg_t;
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/** Type of sprom_ctrl register
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* reserved
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*/
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typedef union {
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struct {
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/** sprom_mem_aux_ctrl : R/W; bitpos: [31:0]; default: 112;
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* reserved
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*/
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uint32_t sprom_mem_aux_ctrl:32;
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};
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uint32_t val;
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} hp_sys_sprom_ctrl_reg_t;
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/** Type of spram_ctrl register
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* reserved
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*/
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typedef union {
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struct {
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/** spram_mem_aux_ctrl : R/W; bitpos: [31:0]; default: 8304;
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* reserved
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*/
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uint32_t spram_mem_aux_ctrl:32;
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};
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uint32_t val;
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} hp_sys_spram_ctrl_reg_t;
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/** Type of sprf_ctrl register
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* reserved
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*/
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typedef union {
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struct {
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/** sprf_mem_aux_ctrl : R/W; bitpos: [31:0]; default: 8304;
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* reserved
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*/
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uint32_t sprf_mem_aux_ctrl:32;
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};
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uint32_t val;
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} hp_sys_sprf_ctrl_reg_t;
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/** Type of sdprf_ctrl register
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* reserved
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*/
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typedef union {
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struct {
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/** sdprf_mem_aux_ctrl : R/W; bitpos: [31:0]; default: 0;
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* reserved
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*/
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uint32_t sdprf_mem_aux_ctrl:32;
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};
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uint32_t val;
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} hp_sys_sdprf_ctrl_reg_t;
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/** Type of audio_codex_ctrl0 register
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* reserved
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*/
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typedef union {
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struct {
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/** dac_in_r1_ie : R/W; bitpos: [0]; default: 1;
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* reserved
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*/
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uint32_t dac_in_r1_ie:1;
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/** dac_in_r1_oe : R/W; bitpos: [1]; default: 0;
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* reserved
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*/
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uint32_t dac_in_r1_oe:1;
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/** dac_in_r0_ie : R/W; bitpos: [2]; default: 1;
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* reserved
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*/
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uint32_t dac_in_r0_ie:1;
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/** dac_in_r0_oe : R/W; bitpos: [3]; default: 0;
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* reserved
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*/
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uint32_t dac_in_r0_oe:1;
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/** adc_data_4_ie : R/W; bitpos: [4]; default: 0;
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* reserved
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*/
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uint32_t adc_data_4_ie:1;
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/** adc_data_4_oe : R/W; bitpos: [5]; default: 1;
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* reserved
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*/
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uint32_t adc_data_4_oe:1;
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/** adc_data_3_ie : R/W; bitpos: [6]; default: 0;
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* reserved
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*/
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uint32_t adc_data_3_ie:1;
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/** adc_data_3_oe : R/W; bitpos: [7]; default: 1;
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* reserved
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*/
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uint32_t adc_data_3_oe:1;
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/** adc_data_2_ie : R/W; bitpos: [8]; default: 0;
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* reserved
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*/
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uint32_t adc_data_2_ie:1;
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/** adc_data_2_oe : R/W; bitpos: [9]; default: 1;
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* reserved
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*/
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uint32_t adc_data_2_oe:1;
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/** adc_data_1_ie : R/W; bitpos: [10]; default: 0;
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* reserved
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*/
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uint32_t adc_data_1_ie:1;
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/** adc_data_1_oe : R/W; bitpos: [11]; default: 1;
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* reserved
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*/
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uint32_t adc_data_1_oe:1;
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/** adc_data_0_ie : R/W; bitpos: [12]; default: 0;
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* reserved
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*/
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uint32_t adc_data_0_ie:1;
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/** adc_data_0_oe : R/W; bitpos: [13]; default: 1;
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* reserved
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*/
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uint32_t adc_data_0_oe:1;
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/** adc_ck_data_ie : R/W; bitpos: [14]; default: 0;
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* reserved
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*/
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uint32_t adc_ck_data_ie:1;
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/** adc_ck_data_oe : R/W; bitpos: [15]; default: 1;
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* reserved
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*/
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uint32_t adc_ck_data_oe:1;
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uint32_t reserved_16:16;
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};
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uint32_t val;
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} hp_sys_audio_codex_ctrl0_reg_t;
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/** Group: Timeout Register */
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/** Type of cpu_peri_timeout_conf register
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* CPU_PERI_TIMEOUT configuration register
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*/
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typedef union {
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struct {
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/** cpu_peri_timeout_thres : R/W; bitpos: [15:0]; default: 65535;
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* Set the timeout threshold for bus access, corresponding to the number of clock
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* cycles of the clock domain.
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*/
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uint32_t cpu_peri_timeout_thres:16;
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/** cpu_peri_timeout_int_clear : WT; bitpos: [16]; default: 0;
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* Set this bit as 1 to clear timeout interrupt
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*/
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uint32_t cpu_peri_timeout_int_clear:1;
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/** cpu_peri_timeout_protect_en : R/W; bitpos: [17]; default: 1;
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* Set this bit as 1 to enable timeout protection for accessing cpu peripheral
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* registers
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*/
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uint32_t cpu_peri_timeout_protect_en:1;
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uint32_t reserved_18:14;
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};
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uint32_t val;
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} hp_sys_cpu_peri_timeout_conf_reg_t;
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/** Type of cpu_peri_timeout_addr register
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* CPU_PERI_TIMEOUT_ADDR register
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*/
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typedef union {
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struct {
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/** cpu_peri_timeout_addr : RO; bitpos: [31:0]; default: 0;
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* Record the address information of abnormal access
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*/
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uint32_t cpu_peri_timeout_addr:32;
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};
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uint32_t val;
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} hp_sys_cpu_peri_timeout_addr_reg_t;
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/** Type of cpu_peri_timeout_uid register
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* CPU_PERI_TIMEOUT_UID register
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*/
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typedef union {
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struct {
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/** cpu_peri_timeout_uid : RO; bitpos: [6:0]; default: 0;
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* Record master id[4:0] & master permission[6:5] when trigger timeout. This register
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* will be cleared after the interrupt is cleared.
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*/
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uint32_t cpu_peri_timeout_uid:7;
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uint32_t reserved_7:25;
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};
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uint32_t val;
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} hp_sys_cpu_peri_timeout_uid_reg_t;
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/** Type of hp_peri_timeout_conf register
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* HP_PERI_TIMEOUT configuration register
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*/
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typedef union {
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struct {
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/** hp_peri_timeout_thres : R/W; bitpos: [15:0]; default: 65535;
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* Set the timeout threshold for bus access, corresponding to the number of clock
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* cycles of the clock domain.
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*/
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uint32_t hp_peri_timeout_thres:16;
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/** hp_peri_timeout_int_clear : WT; bitpos: [16]; default: 0;
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* Set this bit as 1 to clear timeout interrupt
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*/
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uint32_t hp_peri_timeout_int_clear:1;
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/** hp_peri_timeout_protect_en : R/W; bitpos: [17]; default: 1;
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* Set this bit as 1 to enable timeout protection for accessing hp peripheral registers
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*/
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uint32_t hp_peri_timeout_protect_en:1;
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uint32_t reserved_18:14;
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};
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uint32_t val;
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} hp_sys_hp_peri_timeout_conf_reg_t;
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/** Type of hp_peri_timeout_addr register
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* HP_PERI_TIMEOUT_ADDR register
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*/
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typedef union {
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struct {
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/** hp_peri_timeout_addr : RO; bitpos: [31:0]; default: 0;
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* Record the address information of abnormal access
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*/
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uint32_t hp_peri_timeout_addr:32;
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};
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uint32_t val;
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} hp_sys_hp_peri_timeout_addr_reg_t;
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/** Type of hp_peri_timeout_uid register
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* HP_PERI_TIMEOUT_UID register
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*/
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typedef union {
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struct {
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/** hp_peri_timeout_uid : RO; bitpos: [6:0]; default: 0;
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* Record master id[4:0] & master permission[6:5] when trigger timeout. This register
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* will be cleared after the interrupt is cleared.
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*/
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uint32_t hp_peri_timeout_uid:7;
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uint32_t reserved_7:25;
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};
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uint32_t val;
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} hp_sys_hp_peri_timeout_uid_reg_t;
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/** Group: Version Register */
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/** Type of date register
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* Date register.
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*/
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typedef union {
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struct {
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/** date : R/W; bitpos: [27:0]; default: 36720768;
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* HP-SYSTEM date information/ HP-SYSTEM version information.
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*/
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uint32_t date:28;
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uint32_t reserved_28:4;
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};
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uint32_t val;
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} hp_sys_date_reg_t;
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typedef struct hp_sys_dev_t {
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volatile hp_sys_external_device_encrypt_decrypt_control_reg_t external_device_encrypt_decrypt_control;
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volatile hp_sys_sram_usage_conf_reg_t sram_usage_conf;
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volatile hp_sys_sec_dpa_conf_reg_t sec_dpa_conf;
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volatile hp_sys_cpu_peri_timeout_conf_reg_t cpu_peri_timeout_conf;
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volatile hp_sys_cpu_peri_timeout_addr_reg_t cpu_peri_timeout_addr;
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volatile hp_sys_cpu_peri_timeout_uid_reg_t cpu_peri_timeout_uid;
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volatile hp_sys_hp_peri_timeout_conf_reg_t hp_peri_timeout_conf;
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volatile hp_sys_hp_peri_timeout_addr_reg_t hp_peri_timeout_addr;
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volatile hp_sys_hp_peri_timeout_uid_reg_t hp_peri_timeout_uid;
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uint32_t reserved_024[3];
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volatile hp_sys_sdio_ctrl_reg_t sdio_ctrl;
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uint32_t reserved_034;
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volatile hp_sys_rom_table_lock_reg_t rom_table_lock;
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volatile hp_sys_rom_table_reg_t rom_table;
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volatile hp_sys_core_debug_runstall_conf_reg_t core_debug_runstall_conf;
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uint32_t reserved_044[11];
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volatile hp_sys_sprom_ctrl_reg_t sprom_ctrl;
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volatile hp_sys_spram_ctrl_reg_t spram_ctrl;
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volatile hp_sys_sprf_ctrl_reg_t sprf_ctrl;
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volatile hp_sys_sdprf_ctrl_reg_t sdprf_ctrl;
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volatile hp_sys_audio_codex_ctrl0_reg_t audio_codex_ctrl0;
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uint32_t reserved_084[222];
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volatile hp_sys_date_reg_t date;
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} hp_sys_dev_t;
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extern hp_sys_dev_t HP_SYSTEM;
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#ifndef __cplusplus
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_Static_assert(sizeof(hp_sys_dev_t) == 0x400, "Invalid size of hp_sys_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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