mirror of
https://github.com/espressif/esp-idf.git
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457ce080ae
Refactor the AES driver and add HAL, LL and caps. Add better support for running AES-GCM fully in hardware.
455 lines
12 KiB
C
455 lines
12 KiB
C
/**
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* \brief AES block cipher, ESP block hardware accelerated version
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* Based on mbedTLS FIPS-197 compliant version.
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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* Additions Copyright (C) 2016-2017, Espressif Systems (Shanghai) PTE Ltd
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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/*
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* The AES block cipher was designed by Vincent Rijmen and Joan Daemen.
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*
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* http://csrc.nist.gov/encryption/aes/rijndael/Rijndael.pdf
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* http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
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*/
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#include <string.h>
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#include "mbedtls/aes.h"
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#include "mbedtls/platform_util.h"
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#include "aes/esp_aes.h"
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#include "soc/hwcrypto_periph.h"
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#include <sys/lock.h>
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#include "hal/aes_hal.h"
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#include "aes/esp_aes_internal.h"
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#include <freertos/FreeRTOS.h>
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#include "soc/cpu.h"
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#include <stdio.h>
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#include "driver/periph_ctrl.h"
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/* AES uses a spinlock mux not a lock as the underlying block operation
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only takes 208 cycles (to write key & compute block), +600 cycles
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for DPORT protection but +3400 cycles again if you use a full sized lock.
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For CBC, CFB, etc. this may mean that interrupts are disabled for a longer
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period of time for bigger lengths. However at the moment this has to happen
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anyway due to DPORT protection...
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*/
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static portMUX_TYPE aes_spinlock = portMUX_INITIALIZER_UNLOCKED;
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void esp_aes_acquire_hardware( void )
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{
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portENTER_CRITICAL(&aes_spinlock);
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/* Enable AES hardware */
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periph_module_enable(PERIPH_AES_MODULE);
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}
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void esp_aes_release_hardware( void )
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{
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/* Disable AES hardware */
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periph_module_disable(PERIPH_AES_MODULE);
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portEXIT_CRITICAL(&aes_spinlock);
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}
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/* Run a single 16 byte block of AES, using the hardware engine.
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*
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* Call only while holding esp_aes_acquire_hardware().
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*/
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static int esp_aes_block(esp_aes_context *ctx, const void *input, void *output)
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{
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uint32_t i0, i1, i2, i3;
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const uint32_t *input_words = (uint32_t *)input;
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uint32_t *output_words = (uint32_t *)output;
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/* If no key is written to hardware yet, either the user hasn't called
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mbedtls_aes_setkey_enc/mbedtls_aes_setkey_dec - meaning we also don't
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know which mode to use - or a fault skipped the
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key write to hardware. Treat this as a fatal error and zero the output block.
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*/
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if (ctx->key_in_hardware != ctx->key_bytes) {
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bzero(output, 16);
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return MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH;
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}
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i0 = input_words[0];
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i1 = input_words[1];
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i2 = input_words[2];
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i3 = input_words[3];
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aes_hal_transform_block(input, output);
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/* Physical security check: Verify the AES accelerator actually ran, and wasn't
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skipped due to external fault injection while starting the peripheral.
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Note that i0,i1,i2,i3 are copied from input buffer in case input==output.
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Bypassing this check requires at least one additional fault.
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*/
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if (i0 == output_words[0] && i1 == output_words[1] && i2 == output_words[2] && i3 == output_words[3]) {
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// calling zeroing functions to narrow the
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// window for a double-fault of the abort step, here
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memset(output, 0, 16);
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mbedtls_platform_zeroize(output, 16);
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abort();
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}
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return 0;
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}
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void esp_aes_encrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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esp_internal_aes_encrypt(ctx, input, output);
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}
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/*
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* AES-ECB block encryption
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*/
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int esp_internal_aes_encrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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int r;
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_ENCRYPT);
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r = esp_aes_block(ctx, input, output);
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esp_aes_release_hardware();
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return r;
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}
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void esp_aes_decrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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esp_internal_aes_decrypt(ctx, input, output);
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}
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/*
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* AES-ECB block decryption
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*/
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int esp_internal_aes_decrypt(esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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int r;
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_DECRYPT);
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r = esp_aes_block(ctx, input, output);
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esp_aes_release_hardware();
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return r;
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}
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/*
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* AES-ECB block encryption/decryption
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*/
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int esp_aes_crypt_ecb(esp_aes_context *ctx,
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int mode,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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int r;
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, mode);
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r = esp_aes_block(ctx, input, output);
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esp_aes_release_hardware();
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return r;
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}
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/*
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* AES-CBC buffer encryption/decryption
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*/
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int esp_aes_crypt_cbc(esp_aes_context *ctx,
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int mode,
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size_t length,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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uint32_t *output_words = (uint32_t *)output;
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const uint32_t *input_words = (const uint32_t *)input;
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uint32_t *iv_words = (uint32_t *)iv;
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unsigned char temp[16];
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if ( length % 16 ) {
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return ( ERR_ESP_AES_INVALID_INPUT_LENGTH );
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, mode);
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if ( mode == ESP_AES_DECRYPT ) {
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while ( length > 0 ) {
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memcpy(temp, input_words, 16);
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esp_aes_block(ctx, input_words, output_words);
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output_words[0] = output_words[0] ^ iv_words[0];
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output_words[1] = output_words[1] ^ iv_words[1];
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output_words[2] = output_words[2] ^ iv_words[2];
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output_words[3] = output_words[3] ^ iv_words[3];
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memcpy( iv_words, temp, 16 );
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input_words += 4;
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output_words += 4;
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length -= 16;
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}
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} else { // ESP_AES_ENCRYPT
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while ( length > 0 ) {
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output_words[0] = input_words[0] ^ iv_words[0];
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output_words[1] = input_words[1] ^ iv_words[1];
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output_words[2] = input_words[2] ^ iv_words[2];
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output_words[3] = input_words[3] ^ iv_words[3];
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esp_aes_block(ctx, output_words, output_words);
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memcpy( iv_words, output_words, 16 );
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input_words += 4;
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output_words += 4;
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length -= 16;
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}
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}
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esp_aes_release_hardware();
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return 0;
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}
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/*
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* AES-CFB128 buffer encryption/decryption
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*/
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int esp_aes_crypt_cfb128(esp_aes_context *ctx,
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int mode,
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size_t length,
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size_t *iv_off,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int c;
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size_t n = *iv_off;
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_ENCRYPT);
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if ( mode == ESP_AES_DECRYPT ) {
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while ( length-- ) {
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if ( n == 0 ) {
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esp_aes_block(ctx, iv, iv);
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}
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c = *input++;
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*output++ = (unsigned char)( c ^ iv[n] );
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iv[n] = (unsigned char) c;
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n = ( n + 1 ) & 0x0F;
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}
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} else {
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while ( length-- ) {
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if ( n == 0 ) {
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esp_aes_block(ctx, iv, iv);
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}
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iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ );
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n = ( n + 1 ) & 0x0F;
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}
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}
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*iv_off = n;
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esp_aes_release_hardware();
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return 0;
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}
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/*
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* AES-CFB8 buffer encryption/decryption
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*/
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int esp_aes_crypt_cfb8(esp_aes_context *ctx,
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int mode,
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size_t length,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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unsigned char c;
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unsigned char ov[17];
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_ENCRYPT);
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while ( length-- ) {
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memcpy( ov, iv, 16 );
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esp_aes_block(ctx, iv, iv);
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if ( mode == ESP_AES_DECRYPT ) {
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ov[16] = *input;
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}
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c = *output++ = (unsigned char)( iv[0] ^ *input++ );
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if ( mode == ESP_AES_ENCRYPT ) {
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ov[16] = c;
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}
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memcpy( iv, ov + 1, 16 );
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}
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esp_aes_release_hardware();
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return 0;
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}
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/*
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* AES-CTR buffer encryption/decryption
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*/
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int esp_aes_crypt_ctr(esp_aes_context *ctx,
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size_t length,
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size_t *nc_off,
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unsigned char nonce_counter[16],
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unsigned char stream_block[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int c, i;
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size_t n = *nc_off;
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_ENCRYPT);
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while ( length-- ) {
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if ( n == 0 ) {
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esp_aes_block(ctx, nonce_counter, stream_block);
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for ( i = 16; i > 0; i-- ) {
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if ( ++nonce_counter[i - 1] != 0 ) {
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break;
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}
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}
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}
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c = *input++;
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*output++ = (unsigned char)( c ^ stream_block[n] );
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n = ( n + 1 ) & 0x0F;
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}
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*nc_off = n;
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esp_aes_release_hardware();
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return 0;
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}
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/*
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* AES-OFB (Output Feedback Mode) buffer encryption/decryption
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*/
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int esp_aes_crypt_ofb(esp_aes_context *ctx,
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size_t length,
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size_t *iv_off,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int ret = 0;
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size_t n;
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if (ctx == NULL || iv_off == NULL || iv == NULL ||
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input == NULL || output == NULL ) {
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return MBEDTLS_ERR_AES_BAD_INPUT_DATA;
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}
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n = *iv_off;
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if (n > 15) {
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return (MBEDTLS_ERR_AES_BAD_INPUT_DATA);
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}
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if (!valid_key_length(ctx)) {
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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esp_aes_acquire_hardware();
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ctx->key_in_hardware = 0;
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ctx->key_in_hardware = aes_hal_setkey(ctx->key, ctx->key_bytes, ESP_AES_ENCRYPT);
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while (length--) {
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if ( n == 0 ) {
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esp_aes_block(ctx, iv, iv);
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}
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*output++ = *input++ ^ iv[n];
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n = ( n + 1 ) & 0x0F;
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}
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*iv_off = n;
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esp_aes_release_hardware();
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return ( ret );
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}
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