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441 lines
15 KiB
C
441 lines
15 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* INTERNAL API
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* generic interface to PMS memory protection features
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*/
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef IRAM_SRAM_START
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#define IRAM_SRAM_START 0x4037C000
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#endif
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#ifndef DRAM_SRAM_START
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#define DRAM_SRAM_START 0x3FC7C000
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#endif
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typedef enum {
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MEMPROT_NONE = 0x00000000,
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MEMPROT_IRAM0_SRAM = 0x00000001,
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MEMPROT_DRAM0_SRAM = 0x00000002,
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MEMPROT_ALL = 0xFFFFFFFF
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} mem_type_prot_t;
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typedef enum {
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MEMPROT_SPLITLINE_NONE = 0,
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MEMPROT_IRAM0_DRAM0_SPLITLINE,
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MEMPROT_IRAM0_LINE_0_SPLITLINE,
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MEMPROT_IRAM0_LINE_1_SPLITLINE,
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MEMPROT_DRAM0_DMA_LINE_0_SPLITLINE,
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MEMPROT_DRAM0_DMA_LINE_1_SPLITLINE
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} split_line_t;
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typedef enum {
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MEMPROT_PMS_AREA_NONE = 0,
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MEMPROT_IRAM0_PMS_AREA_0,
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MEMPROT_IRAM0_PMS_AREA_1,
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MEMPROT_IRAM0_PMS_AREA_2,
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MEMPROT_IRAM0_PMS_AREA_3,
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MEMPROT_DRAM0_PMS_AREA_0,
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MEMPROT_DRAM0_PMS_AREA_1,
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MEMPROT_DRAM0_PMS_AREA_2,
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MEMPROT_DRAM0_PMS_AREA_3
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} pms_area_t;
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typedef enum
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{
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MEMPROT_PMS_WORLD_0 = 0,
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MEMPROT_PMS_WORLD_1,
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MEMPROT_PMS_WORLD_2,
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MEMPROT_PMS_WORLD_INVALID = 0xFFFFFFFF
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} pms_world_t;
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typedef enum
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{
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MEMPROT_PMS_OP_READ = 0,
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MEMPROT_PMS_OP_WRITE,
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MEMPROT_PMS_OP_FETCH,
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MEMPROT_PMS_OP_INVALID = 0xFFFFFFFF
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} pms_operation_type_t;
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/**
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* @brief Converts Memory protection type to string
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*/
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const char *esp_memprot_mem_type_to_str(mem_type_prot_t mem_type);
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/**
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* @brief Converts Split line type to string
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*
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* @param line_type Split line type (see split_line_t enum)
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*/
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const char *esp_memprot_split_line_to_str(split_line_t line_type);
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/**
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* @brief Converts PMS Area type to string
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*
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* @param area_type PMS Area type (see pms_area_t enum)
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*/
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const char *esp_memprot_pms_to_str(pms_area_t area_type);
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/**
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* @brief Returns PMS splitting address for given Split line type
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*
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* The value is taken from PMS configuration registers (IRam0 range)
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* For details on split lines see 'esp_memprot_set_prot_int' function description
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*
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* @param line_type Split line type (see split_line_t enum)
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*
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* @return appropriate split line address
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*/
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uint32_t *esp_memprot_get_split_addr(split_line_t line_type);
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/**
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* @brief Returns default main IRAM/DRAM splitting address
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*
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* The address value is given by _iram_text_end global (IRam0 range)
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* @return Main I/D split line (IRam0_DRam0_Split_Addr)
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*/
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void *esp_memprot_get_default_main_split_addr(void);
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/**
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* @brief Sets a lock for the main IRAM/DRAM splitting address
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*
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* Locks can be unlocked only by digital system reset
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*/
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void esp_memprot_set_split_line_lock(void);
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/**
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* @brief Gets a lock status for the main IRAM/DRAM splitting address
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*
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* @return true/false (locked/unlocked)
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*/
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bool esp_memprot_get_split_line_lock(void);
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/**
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* @brief Sets required split line address
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*
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* @param line_type Split line type (see split_line_t enum)
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* @param line_addr target address from a memory range relevant to given line_type (IRAM/DRAM)
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*/
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void esp_memprot_set_split_line(split_line_t line_type, const void *line_addr);
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/**
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* @brief Sets a lock for PMS Area settings of required Memory type
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*
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* Locks can be unlocked only by digital system reset
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*/
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void esp_memprot_set_pms_lock(mem_type_prot_t mem_type);
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/**
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* @brief Gets a lock status for PMS Area settings of required Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return true/false (locked/unlocked)
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*/
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bool esp_memprot_get_pms_lock(mem_type_prot_t mem_type);
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/**
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* @brief Sets permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
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*
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* @param area_type IRam0 PMS Area type (see pms_area_t enum)
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* @param r Read permission flag
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* @param w Write permission flag
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* @param x Execute permission flag
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*/
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void esp_memprot_iram_set_pms_area(pms_area_t area_type, bool r, bool w, bool x);
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/**
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* @brief Gets current permissions for given PMS Area in IRam0 memory range (MEMPROT_IRAM0_SRAM)
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*
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* @param area_type IRam0 PMS Area type (see pms_area_t enum)
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* @param r Read permission flag holder
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* @param w Write permission flag holder
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* @param x Execute permission flag holder
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*/
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void esp_memprot_iram_get_pms_area(pms_area_t area_type, bool *r, bool *w, bool *x);
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/**
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* @brief Sets permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
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*
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* @param area_type DRam0 PMS Area type (see pms_area_t enum)
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* @param r Read permission flag
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* @param w Write permission flag
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*/
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void esp_memprot_dram_set_pms_area(pms_area_t area_type, bool r, bool w);
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/**
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* @brief Gets current permissions for given PMS Area in DRam0 memory range (MEMPROT_DRAM0_SRAM)
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*
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* @param area_type DRam0 PMS Area type (see pms_area_t enum)
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* @param r Read permission flag holder
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* @param w Write permission flag holder
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*/
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void esp_memprot_dram_get_pms_area(pms_area_t area_type, bool *r, bool *w);
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/**
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* @brief Sets a lock for PMS interrupt monitor settings of required Memory type
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*
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* Locks can be unlocked only by digital system reset
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*/
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void esp_memprot_set_monitor_lock(mem_type_prot_t mem_type);
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/**
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* @brief Gets a lock status for PMS interrupt monitor settings of required Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return true/false (locked/unlocked)
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*/
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bool esp_memprot_get_monitor_lock(mem_type_prot_t mem_type);
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/**
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* @brief Enable PMS violation interrupt monitoring of required Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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* @param enable/disable
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*/
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void esp_memprot_set_monitor_en(mem_type_prot_t mem_type, bool enable);
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/**
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* @brief Gets enable/disable status for PMS interrupt monitor settings of required Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return true/false (enabled/disabled)
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*/
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bool esp_memprot_get_monitor_en(mem_type_prot_t mem_type);
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/**
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* @brief Gets CPU ID for currently active PMS violation interrupt
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*
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* @return CPU ID (CPU_PRO for ESP32-C2)
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*/
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int IRAM_ATTR esp_memprot_intr_get_cpuid(void);
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/**
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* @brief Clears current interrupt ON flag for given Memory type
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*
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* Interrupt clearing happens in two steps:
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* 1. Interrupt CLR flag is set (to clear the interrupt ON status)
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* 2. Interrupt CLR flag is reset (to allow further monitoring)
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* This operation is non-atomic by PMS module design
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*/
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void IRAM_ATTR esp_memprot_monitor_clear_intr(mem_type_prot_t mem_type);
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/**
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* @brief Returns active PMS violation interrupt (if any)
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*
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* This function iterates through supported Memory type status registers
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* and returns the first interrupt-on flag. If none is found active,
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* MEMPROT_NONE is returned.
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* Order of checking (in current version):
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* 1. MEMPROT_IRAM0_SRAM
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* 2. MEMPROT_DRAM0_SRAM
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*
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* @return mem_type Memory protection type related to active interrupt found (see mem_type_prot_t enum)
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*/
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mem_type_prot_t IRAM_ATTR esp_memprot_get_active_intr_memtype(void);
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/**
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* @brief Checks whether any violation interrupt is active
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*
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* @return true/false (yes/no)
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*/
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bool IRAM_ATTR esp_memprot_is_locked_any(void);
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/**
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* @brief Checks whether any violation interrupt is enabled
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*
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* @return true/false (yes/no)
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*/
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bool IRAM_ATTR esp_memprot_is_intr_ena_any(void);
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/**
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* @brief Checks whether any violation interrupt is enabled
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*
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* @return true/false (yes/no)
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*/
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bool IRAM_ATTR esp_memprot_get_violate_intr_on(mem_type_prot_t mem_type);
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/**
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* @brief Returns the address which caused the violation interrupt (if any)
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*
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* The address is taken from appropriate PMS violation status register, based given Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return faulting address
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*/
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uint32_t IRAM_ATTR esp_memprot_get_violate_addr(mem_type_prot_t mem_type);
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/**
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* @brief Returns the World identifier of the code causing the violation interrupt (if any)
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*
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* The value is taken from appropriate PMS violation status register, based given Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return World identifier (see pms_world_t enum)
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*/
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pms_world_t IRAM_ATTR esp_memprot_get_violate_world(mem_type_prot_t mem_type);
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/**
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* @brief Returns Read or Write operation type which caused the violation interrupt (if any)
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*
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* The value (bit) is taken from appropriate PMS violation status register, based given Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return PMS operation type relevant to mem_type parameter (se pms_operation_type_t)
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*/
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pms_operation_type_t IRAM_ATTR esp_memprot_get_violate_wr(mem_type_prot_t mem_type);
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/**
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* @brief Returns LoadStore flag of the operation type which caused the violation interrupt (if any)
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*
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* The value (bit) is taken from appropriate PMS violation status register, based given Memory type
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* Effective only on IRam0 access
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return true/false (LoadStore bit on/off)
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*/
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bool IRAM_ATTR esp_memprot_get_violate_loadstore(mem_type_prot_t mem_type);
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/**
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* @brief Returns byte-enables for the address which caused the violation interrupt (if any)
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*
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* The value is taken from appropriate PMS violation status register, based given Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return byte-enables
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*/
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uint32_t IRAM_ATTR esp_memprot_get_violate_byte_en(mem_type_prot_t mem_type);
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/**
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* @brief Returns raw contents of DRam0 status register 1
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*
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* @return 32-bit register value
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*/
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uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_1(void);
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/**
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* @brief Returns raw contents of DRam0 status register 2
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*
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* @return 32-bit register value
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*/
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uint32_t IRAM_ATTR esp_memprot_get_dram_status_reg_2(void);
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/**
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* @brief Returns raw contents of IRam0 status register
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*
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* @return 32-bit register value
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*/
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uint32_t IRAM_ATTR esp_memprot_get_iram_status_reg(void);
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/**
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* @brief Register PMS violation interrupt in global interrupt matrix for given Memory type
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*
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* Memory protection components uses specific interrupt number, see ETS_MEMPROT_ERR_INUM
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* The registration makes the panic-handler routine being called when the interrupt appears
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*/
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void esp_memprot_set_intr_matrix(mem_type_prot_t mem_type);
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/**
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* @brief Convenient routine for setting the PMS defaults
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*
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* Called on application startup, depending on CONFIG_ESP_SYSTEM_MEMPROT_FEATURE Kconfig settings
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* For implementation details see 'esp_memprot_set_prot_int' description
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*
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* @param invoke_panic_handler register all interrupts for panic handling (true/false)
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* @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
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* @param mem_type_mask 32-bit field of specific PMS parts to configure (see 'esp_memprot_set_prot_int')
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*/
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void esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uint32_t *mem_type_mask);
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/**
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* @brief Internal routine for setting the PMS defaults
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*
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* Called on application startup from within 'esp_memprot_set_prot'. Allows setting a specific splitting address
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* (main I/D split line) - see the parameter 'split_addr'. If the 'split_addr' equals to NULL, default I/D split line
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* is used (&_iram_text_end) and all the remaining lines share the same address.
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* The function sets all the split lines and PMS areas to the same space,
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* ie there is a single instruction space and single data space at the end.
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* The PMS split lines and permission areas scheme described below:
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*
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* DRam0/DMA IRam0
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* -----------------------------------------------
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* ... | IRam0_PMS_0 |
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* DRam0_PMS_0 ----------------------------------------------- IRam0_line1_Split_addr
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* ... | IRam0_PMS_1 |
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* ... ----------------------------------------------- IRam0_line0_Split_addr
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* | IRam0_PMS_2 |
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* =============================================== IRam0_DRam0_Split_addr (main I/D)
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* | DRam0_PMS_1 |
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* DRam0_DMA_line0_Split_addr ----------------------------------------------- ...
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* | DRam0_PMS_2 | ...
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* DRam0_DMA_line1_Split_addr ----------------------------------------------- IRam0_PMS_3
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* | DRam0_PMS_3 | ...
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* -----------------------------------------------
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*
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* Default settings provided by 'esp_memprot_set_prot_int' are as follows:
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*
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* DRam0/DMA IRam0
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* -----------------------------------------------
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* | IRam0_PMS_0 = IRam0_PMS_1 = IRam0_PMS_2 |
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* | DRam0_PMS_0 | IRam0_line1_Split_addr
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* DRam0_DMA_line0_Split_addr | | =
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* = =============================================== IRam0_line0_Split_addr
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* DRam0_DMA_line1_Split_addr | | =
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* | DRam0_PMS_1 = DRam0_PMS_2 = DRam0_PMS_3 | IRam0_DRam0_Split_addr (main I/D)
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* | IRam0_PMS_3 |
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* -----------------------------------------------
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*
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* Once the memprot feature is locked, it can be unlocked only by digital system reset
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*
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* @param invoke_panic_handler register all the violation interrupts for panic handling (true/false)
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* @param lock_feature lock the defaults to prevent further PMS settings changes (true/false)
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* @param split_addr specific main I/D adrees or NULL to use default ($_iram_text_end)
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* @param mem_type_mask 32-bit field of specific PMS parts to configure (members of mem_type_prot_t)
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*/
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void esp_memprot_set_prot_int(bool invoke_panic_handler, bool lock_feature, void *split_addr, uint32_t *mem_type_mask);
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/**
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* @brief Returns raw contents of PMS interrupt monitor register for given Memory type
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*
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* @param mem_type Memory protection type (see mem_type_prot_t enum)
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*
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* @return 32-bit register value
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*/
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uint32_t esp_memprot_get_monitor_enable_reg(mem_type_prot_t mem_type);
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#ifdef __cplusplus
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}
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#endif
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