mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
4275056423
If esp_restart_noos() is run and the stack address points to external memory (SPIRAM) then Cache_Read_Disable() raises up the error "Cache disabled but cached memory region accessed" to fix this we switch stack to internal RAM before disable cache. Added unit tests. Closes: https://github.com/espressif/esp-idf/issues/5107
333 lines
10 KiB
C
333 lines
10 KiB
C
#include "unity.h"
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#include "esp_system.h"
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#include "esp_task_wdt.h"
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#include "esp_attr.h"
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#include "soc/rtc_periph.h"
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#include "driver/timer.h"
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#include "esp32/rom/rtc.h"
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#include "esp_sleep.h"
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#define RTC_BSS_ATTR __attribute__((section(".rtc.bss")))
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#define CHECK_VALUE 0x89abcdef
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static __NOINIT_ATTR uint32_t s_noinit_val;
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static RTC_NOINIT_ATTR uint32_t s_rtc_noinit_val;
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static RTC_DATA_ATTR uint32_t s_rtc_data_val;
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static RTC_BSS_ATTR uint32_t s_rtc_bss_val;
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/* There is no practical difference between placing something into RTC_DATA and
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* RTC_RODATA. This only checks a usage pattern where the variable has a non-zero
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* initializer (should be initialized by the bootloader).
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*/
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static RTC_RODATA_ATTR uint32_t s_rtc_rodata_val = CHECK_VALUE;
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static RTC_FAST_ATTR uint32_t s_rtc_force_fast_val;
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static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
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static void setup_values(void)
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{
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s_noinit_val = CHECK_VALUE;
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s_rtc_noinit_val = CHECK_VALUE;
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s_rtc_data_val = CHECK_VALUE;
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s_rtc_bss_val = CHECK_VALUE;
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TEST_ASSERT_EQUAL_HEX32_MESSAGE(CHECK_VALUE, s_rtc_rodata_val,
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"s_rtc_rodata_val should already be set up");
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s_rtc_force_fast_val = CHECK_VALUE;
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s_rtc_force_slow_val = CHECK_VALUE;
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}
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/* This test needs special test runners: rev1 silicon, and SPI flash with
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* fast start-up time. Otherwise reset reason will be RTCWDT_RESET.
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*/
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TEST_CASE("reset reason ESP_RST_POWERON", "[reset][ignore]")
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{
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TEST_ASSERT_EQUAL(ESP_RST_POWERON, esp_reset_reason());
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}
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static void do_deep_sleep(void)
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{
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setup_values();
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esp_sleep_enable_timer_wakeup(10000);
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esp_deep_sleep_start();
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}
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static void check_reset_reason_deep_sleep(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_DEEPSLEEP", "[reset_reason][reset=DEEPSLEEP_RESET]",
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do_deep_sleep,
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check_reset_reason_deep_sleep);
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static void do_exception(void)
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{
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setup_values();
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*(int*) (0x40000001) = 0;
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}
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static void do_abort(void)
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{
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setup_values();
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abort();
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}
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static void check_reset_reason_panic(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after exception", "[reset_reason][reset=LoadStoreError,SW_CPU_RESET]",
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do_exception,
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check_reset_reason_panic);
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after abort", "[reset_reason][reset=abort,SW_CPU_RESET]",
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do_abort,
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check_reset_reason_panic);
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static void do_restart(void)
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{
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setup_values();
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esp_restart();
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}
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#if portNUM_PROCESSORS > 1
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static void do_restart_from_app_cpu(void)
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{
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setup_values();
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xTaskCreatePinnedToCore((TaskFunction_t) &do_restart, "restart", 2048, NULL, 5, NULL, 1);
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vTaskDelay(2);
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}
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#endif
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static void check_reset_reason_sw(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart", "[reset_reason][reset=SW_CPU_RESET]",
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do_restart,
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check_reset_reason_sw);
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#if portNUM_PROCESSORS > 1
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart from APP CPU", "[reset_reason][reset=SW_CPU_RESET]",
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do_restart_from_app_cpu,
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check_reset_reason_sw);
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#endif
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static void do_int_wdt(void)
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{
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setup_values();
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portENTER_CRITICAL_NESTED();
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while(1);
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}
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static void do_int_wdt_hw(void)
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{
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setup_values();
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XTOS_SET_INTLEVEL(XCHAL_NMILEVEL);
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while(1);
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}
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static void check_reset_reason_int_wdt(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_INT_WDT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_INT_WDT after interrupt watchdog (panic)",
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"[reset_reason][reset=Interrupt wdt timeout on CPU0,SW_CPU_RESET]",
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do_int_wdt,
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check_reset_reason_int_wdt);
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_INT_WDT after interrupt watchdog (hw)",
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"[reset_reason][reset=TG1WDT_SYS_RESET]",
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do_int_wdt_hw,
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check_reset_reason_int_wdt);
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static void do_task_wdt(void)
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{
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setup_values();
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esp_task_wdt_init(1, true);
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esp_task_wdt_add(xTaskGetIdleTaskHandleForCPU(0));
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while(1);
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}
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static void check_reset_reason_task_wdt(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_TASK_WDT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_TASK_WDT after task watchdog",
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"[reset_reason][reset=abort,SW_CPU_RESET]",
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do_task_wdt,
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check_reset_reason_task_wdt);
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static void do_rtc_wdt(void)
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{
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setup_values();
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WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_SYS_RESET_LENGTH, 7);
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG0, RTC_WDT_STG_SEL_RESET_SYSTEM);
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WRITE_PERI_REG(RTC_CNTL_WDTCONFIG1_REG, 10000);
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REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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while(1);
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}
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static void check_reset_reason_any_wdt(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_WDT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_WDT after RTC watchdog",
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"[reset_reason][reset=RTCWDT_RTC_RESET]",
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do_rtc_wdt,
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check_reset_reason_any_wdt);
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static void do_brownout(void)
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{
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setup_values();
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printf("Manual test: lower the supply voltage to cause brownout\n");
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vTaskSuspend(NULL);
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}
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static void check_reset_reason_brownout(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_BROWNOUT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_BROWNOUT after brownout event",
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"[reset_reason][ignore][reset=SW_CPU_RESET]",
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do_brownout,
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check_reset_reason_brownout);
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#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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#ifndef CONFIG_FREERTOS_UNICORE
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#include "xt_instr_macros.h"
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#include "xtensa/config/specreg.h"
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static int size_stack = 1024 * 3;
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static StackType_t *start_addr_stack;
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static int fibonacci(int n, void* func(void))
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{
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int tmp1 = n, tmp2 = n;
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uint32_t base, start;
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RSR(WINDOWBASE, base);
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RSR(WINDOWSTART, start);
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printf("WINDOWBASE = %-2d WINDOWSTART = 0x%x\n", base, start);
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if (n <= 1) {
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StackType_t *last_addr_stack = get_sp();
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StackType_t *used_stack = (StackType_t *) (start_addr_stack - last_addr_stack);
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printf("addr_stack = %p, used[%p]/all[0x%x] space in stack\n", last_addr_stack, used_stack, size_stack);
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func();
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return n;
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}
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int fib = fibonacci(n - 1, func) + fibonacci(n - 2, func);
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printf("fib = %d\n", (tmp1 - tmp2) + fib);
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return fib;
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}
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static void test_task(void *func)
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{
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start_addr_stack = get_sp();
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if (esp_ptr_external_ram(start_addr_stack)) {
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printf("restart_task: uses external stack, addr_stack = %p\n", start_addr_stack);
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} else {
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printf("restart_task: uses internal stack, addr_stack = %p\n", start_addr_stack);
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}
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fibonacci(35, func);
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}
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static void func_do_exception(void)
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{
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*((int *) 0) = 0;
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}
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static void init_restart_task(void)
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{
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StackType_t *stack_for_task = (StackType_t *) heap_caps_calloc(1, size_stack, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
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printf("init_task: current addr_stack = %p, stack_for_task = %p\n", get_sp(), stack_for_task);
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static StaticTask_t task_buf;
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xTaskCreateStaticPinnedToCore(test_task, "test_task", size_stack, esp_restart, 5, stack_for_task, &task_buf, 1);
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while (1) { };
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}
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static void init_task_do_exception(void)
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{
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StackType_t *stack_for_task = (StackType_t *) heap_caps_calloc(1, size_stack, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
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printf("init_task: current addr_stack = %p, stack_for_task = %p\n", get_sp(), stack_for_task);
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static StaticTask_t task_buf;
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xTaskCreateStaticPinnedToCore(test_task, "test_task", size_stack, func_do_exception, 5, stack_for_task, &task_buf, 1);
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while (1) { };
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}
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static void test1_finish(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
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printf("test - OK\n");
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}
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static void test2_finish(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
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printf("test - OK\n");
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart in a task with spiram stack", "[spiram_stack][reset=SW_CPU_RESET]",
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init_restart_task,
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test1_finish);
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after an exception in a task with spiram stack", "[spiram_stack][reset=StoreProhibited,SW_CPU_RESET]",
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init_task_do_exception,
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test2_finish);
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#endif // CONFIG_FREERTOS_UNICORE
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#endif // CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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/* Not tested here: ESP_RST_SDIO */
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