esp-idf/components/esp_system/port/soc
Mahavir Jain cdc1a2551b Merge branch 'feature/enable_rsa_support_for_c5' into 'master'
feat: enable RSA support for c5

See merge request espressif/esp-idf!29189
2024-03-22 10:10:47 +08:00
..
esp32 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
esp32c2 Merge branch 'feature/optimize_chips_active_power' into 'master' 2024-03-14 12:08:33 +08:00
esp32c3 refactor(hal/usb): Remove usb_fsls_phy_ll.h 2024-03-18 19:23:43 +08:00
esp32c5 Merge branch 'feature/enable_rsa_support_for_c5' into 'master' 2024-03-22 10:10:47 +08:00
esp32c6 refactor(hal/usb): Remove usb_fsls_phy_ll.h 2024-03-18 19:23:43 +08:00
esp32c61 feat(esp32c61): new chip add system and esp_timer support 2024-03-21 11:31:15 +08:00
esp32h2 refactor(hal/usb): Remove usb_fsls_phy_ll.h 2024-03-18 19:23:43 +08:00
esp32p4 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
esp32s2 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
esp32s3 refactor(hal/usb): Remove usb_fsls_phy_ll.h 2024-03-18 19:23:43 +08:00
linux feat(esp_system): Partially buildable on Linux now 2022-11-16 09:03:09 +01:00