Omar Chebib cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3 ... When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible to set pins 18 and 19 as GPIOs. This commit solves this by manually disabling USB JTAG when using pins 18 or 19. The functions shall use `gpio_hal_iomux_func_sel` instead of `PIN_FUNC_SELELECT`.		2021-04-08 14:01:18 +08:00
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corefile	fix(coredump): parse registers values from stack	2021-01-29 11:12:21 +08:00
include	Merge branch 'feature/coredump_refactor_riscv_support' into 'master'	2021-02-25 22:41:27 +00:00
include_core_dump	espcoredump: code refactoring and add support for RISC-V implemetation	2021-02-07 19:04:19 +08:00
src	gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3	2021-04-08 14:01:18 +08:00
test	core dump: modify the test according to the refactor	2021-01-21 15:14:59 +08:00
CMakeLists.txt	espcoredump: code refactoring and add support for RISC-V implemetation	2021-02-07 19:04:19 +08:00
component.mk	espcoredump: Fix bugs related to (fake) stacks	2021-03-22 11:38:21 +08:00
espcoredump.py	Add mypy check to pre-commit-config	2021-02-25 07:05:43 +00:00
Kconfig	espcoredump: code refactoring and add support for RISC-V implemetation	2021-02-07 19:04:19 +08:00
linker.lf	ldgen: use uppercase keywords for flags	2021-03-01 14:19:34 +08:00
sdkconfig.rename	espcoredump: remove ESP32 prefix from config options	2020-09-30 20:22:27 +05:30