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ccf51a6263
This commit adds the source files for the GCC RISC-V port of FreeRTOS V10.5.1. Files copied from https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/V10.5.1/portable/GCC/RISC-V
208 lines
9.9 KiB
C
208 lines
9.9 KiB
C
/*
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* FreeRTOS Kernel V10.5.1 (ESP-IDF SMP modified)
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-FileCopyrightText: 2021 Amazon.com, Inc. or its affiliates
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*
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* SPDX-License-Identifier: MIT
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*
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* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the RISC-V port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "portmacro.h"
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/* Standard includes. */
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#include "string.h"
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#ifdef configCLINT_BASE_ADDRESS
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#warning The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
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#endif
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#ifndef configMTIME_BASE_ADDRESS
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#warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
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#endif
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#ifndef configMTIMECMP_BASE_ADDRESS
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#warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
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#endif
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/* Let the user override the pre-loading of the initial RA. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS 0
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#endif
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/* The stack used by interrupt service routines. Set configISR_STACK_SIZE_WORDS
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* to use a statically allocated array as the interrupt stack. Alternative leave
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* configISR_STACK_SIZE_WORDS undefined and update the linker script so that a
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* linker variable names __freertos_irq_stack_top has the same value as the top
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* of the stack used by main. Using the linker script method will repurpose the
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* stack that was used by main before the scheduler was started for use as the
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* interrupt stack after the scheduler has started. */
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#ifdef configISR_STACK_SIZE_WORDS
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static __attribute__ ((aligned(16))) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 };
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const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] );
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/* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
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the task stacks, and so will legitimately appear in many positions within
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the ISR stack. */
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#define portISR_STACK_FILL_BYTE 0xee
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#else
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extern const uint32_t __freertos_irq_stack_top[];
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const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top;
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#endif
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/*
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* Setup the timer to generate the tick interrupts. The implementation in this
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* file is weak to allow application writers to change the timer used to
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* generate the tick interrupt.
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*/
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void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
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/*-----------------------------------------------------------*/
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/* Used to program the machine timer compare register. */
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uint64_t ullNextTime = 0ULL;
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const uint64_t *pullNextTime = &ullNextTime;
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const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */
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uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;
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volatile uint64_t * pullMachineTimerCompareRegister = NULL;
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/* Holds the critical nesting value - deliberately non-zero at start up to
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* ensure interrupts are not accidentally enabled before the scheduler starts. */
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size_t xCriticalNesting = ( size_t ) 0xaaaaaaaa;
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size_t *pxCriticalNesting = &xCriticalNesting;
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/* Used to catch tasks that attempt to return from their implementing function. */
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size_t xTaskReturnAddress = ( size_t ) portTASK_RETURN_ADDRESS;
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/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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* stack checking. A problem in the ISR stack will trigger an assert, not call
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* the stack overflow hook function (because the stack overflow hook is specific
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* to a task stack, not the ISR stack). */
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#if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 )
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#warning This path not tested, or even compiled yet.
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static const uint8_t ucExpectedStackBytes[] = {
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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/*-----------------------------------------------------------*/
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#if( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )
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void vPortSetupTimerInterrupt( void )
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{
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte type so high 32-bit word is 4 bytes up. */
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );
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volatile uint32_t ulHartId;
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__asm volatile( "csrr %0, mhartid" : "=r"( ulHartId ) );
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pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) );
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do
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{
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ulCurrentTimeHigh = *pulTimeHigh;
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ulCurrentTimeLow = *pulTimeLow;
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} while( ulCurrentTimeHigh != *pulTimeHigh );
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ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
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ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */
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ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
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ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
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*pullMachineTimerCompareRegister = ullNextTime;
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/* Prepare the time to use after the next tick interrupt. */
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ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
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}
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#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void xPortStartFirstTask( void );
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#if( configASSERT_DEFINED == 1 )
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{
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/* Check alignment of the interrupt stack - which is the same as the
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* stack that was being used by main() prior to the scheduler being
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* started. */
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configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 );
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#ifdef configISR_STACK_SIZE_WORDS
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{
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memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
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}
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#endif /* configISR_STACK_SIZE_WORDS */
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}
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#endif /* configASSERT_DEFINED */
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/* If there is a CLINT then it is ok to use the default implementation
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* in this file, otherwise vPortSetupTimerInterrupt() must be implemented to
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* configure whichever clock is to be used to generate the tick interrupt. */
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vPortSetupTimerInterrupt();
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#if( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
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{
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/* Enable mtime and external interrupts. 1<<7 for timer interrupt,
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* 1<<11 for external interrupt. _RB_ What happens here when mtime is
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* not present as with pulpino? */
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__asm volatile( "csrs mie, %0" :: "r"(0x880) );
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}
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#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */
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xPortStartFirstTask();
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/* Should not get here as after calling xPortStartFirstTask() only tasks
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* should be executing. */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented. */
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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