mirror of
https://github.com/espressif/esp-idf.git
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438 lines
11 KiB
C
438 lines
11 KiB
C
/**
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Group: key register */
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/** Type of key_0 register
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* Key material key_0 configure register
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*/
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typedef union {
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struct {
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/** key_0 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_0 that is a part of key material.
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*/
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uint32_t key_0:32;
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};
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uint32_t val;
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} aes_key_0_reg_t;
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/** Type of key_1 register
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* Key material key_1 configure register
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*/
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typedef union {
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struct {
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/** key_1 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_1 that is a part of key material.
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*/
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uint32_t key_1:32;
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};
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uint32_t val;
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} aes_key_1_reg_t;
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/** Type of key_2 register
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* Key material key_2 configure register
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*/
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typedef union {
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struct {
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/** key_2 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_2 that is a part of key material.
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*/
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uint32_t key_2:32;
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};
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uint32_t val;
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} aes_key_2_reg_t;
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/** Type of key_3 register
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* Key material key_3 configure register
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*/
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typedef union {
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struct {
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/** key_3 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_3 that is a part of key material.
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*/
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uint32_t key_3:32;
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};
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uint32_t val;
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} aes_key_3_reg_t;
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/** Type of key_4 register
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* Key material key_4 configure register
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*/
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typedef union {
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struct {
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/** key_4 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_4 that is a part of key material.
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*/
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uint32_t key_4:32;
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};
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uint32_t val;
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} aes_key_4_reg_t;
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/** Type of key_5 register
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* Key material key_5 configure register
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*/
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typedef union {
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struct {
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/** key_5 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_5 that is a part of key material.
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*/
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uint32_t key_5:32;
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};
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uint32_t val;
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} aes_key_5_reg_t;
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/** Type of key_6 register
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* Key material key_6 configure register
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*/
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typedef union {
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struct {
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/** key_6 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_6 that is a part of key material.
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*/
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uint32_t key_6:32;
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};
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uint32_t val;
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} aes_key_6_reg_t;
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/** Type of key_7 register
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* Key material key_7 configure register
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*/
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typedef union {
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struct {
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/** key_7 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores key_7 that is a part of key material.
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*/
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uint32_t key_7:32;
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};
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uint32_t val;
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} aes_key_7_reg_t;
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/** Group: text in register */
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/** Type of text_in_0 register
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* source text material text_in_0 configure register
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*/
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typedef union {
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struct {
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/** text_in_0 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_in_0 that is a part of source text material.
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*/
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uint32_t text_in_0:32;
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};
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uint32_t val;
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} aes_text_in_0_reg_t;
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/** Type of text_in_1 register
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* source text material text_in_1 configure register
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*/
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typedef union {
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struct {
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/** text_in_1 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_in_1 that is a part of source text material.
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*/
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uint32_t text_in_1:32;
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};
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uint32_t val;
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} aes_text_in_1_reg_t;
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/** Type of text_in_2 register
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* source text material text_in_2 configure register
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*/
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typedef union {
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struct {
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/** text_in_2 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_in_2 that is a part of source text material.
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*/
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uint32_t text_in_2:32;
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};
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uint32_t val;
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} aes_text_in_2_reg_t;
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/** Type of text_in_3 register
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* source text material text_in_3 configure register
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*/
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typedef union {
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struct {
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/** text_in_3 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_in_3 that is a part of source text material.
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*/
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uint32_t text_in_3:32;
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};
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uint32_t val;
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} aes_text_in_3_reg_t;
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/** Group: text out register */
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/** Type of text_out_0 register
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* result text material text_out_0 configure register
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*/
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typedef union {
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struct {
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/** text_out_0 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_out_0 that is a part of result text material.
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*/
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uint32_t text_out_0:32;
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};
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uint32_t val;
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} aes_text_out_0_reg_t;
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/** Type of text_out_1 register
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* result text material text_out_1 configure register
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*/
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typedef union {
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struct {
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/** text_out_1 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_out_1 that is a part of result text material.
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*/
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uint32_t text_out_1:32;
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};
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uint32_t val;
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} aes_text_out_1_reg_t;
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/** Type of text_out_2 register
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* result text material text_out_2 configure register
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*/
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typedef union {
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struct {
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/** text_out_2 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_out_2 that is a part of result text material.
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*/
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uint32_t text_out_2:32;
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};
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uint32_t val;
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} aes_text_out_2_reg_t;
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/** Type of text_out_3 register
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* result text material text_out_3 configure register
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*/
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typedef union {
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struct {
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/** text_out_3 : R/W; bitpos: [31:0]; default: 0;
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* This bits stores text_out_3 that is a part of result text material.
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*/
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uint32_t text_out_3:32;
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};
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uint32_t val;
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} aes_text_out_3_reg_t;
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/** Group: Configuration register */
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/** Type of mode register
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* AES Mode register
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*/
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typedef union {
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struct {
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/** mode : R/W; bitpos: [2:0]; default: 0;
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* This bits decides which one operation mode will be used. 3'd0: AES-EN-128, 3'd1:
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* AES-EN-192, 3'd2: AES-EN-256, 3'd4: AES-DE-128, 3'd5: AES-DE-192, 3'd6: AES-DE-256.
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*/
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uint32_t mode:3;
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uint32_t reserved_3:29;
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};
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uint32_t val;
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} aes_mode_reg_t;
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/** Type of block_mode register
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* AES cipher block mode register
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*/
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typedef union {
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struct {
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/** block_mode : R/W; bitpos: [2:0]; default: 0;
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* Those bits decides which block mode will be used. 0x0: ECB, 0x1: CBC, 0x2: OFB,
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* 0x3: CTR, 0x4: CFB-8, 0x5: CFB-128, 0x6: GCM, 0x7: reserved.
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*/
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uint32_t block_mode:3;
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uint32_t reserved_3:29;
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};
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uint32_t val;
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} aes_block_mode_reg_t;
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/** Type of block_num register
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* AES block number register
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*/
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typedef union {
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struct {
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/** block_num : R/W; bitpos: [31:0]; default: 0;
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* Those bits stores the number of Plaintext/ciphertext block.
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*/
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uint32_t block_num:32;
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};
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uint32_t val;
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} aes_block_num_reg_t;
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/** Type of inc_sel register
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* Standard incrementing function configure register
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*/
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typedef union {
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struct {
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/** inc_sel : R/W; bitpos: [0]; default: 0;
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* This bit decides the standard incrementing function. 0: INC32. 1: INC128.
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*/
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uint32_t inc_sel:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} aes_inc_sel_reg_t;
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/** Group: Control/Status register */
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/** Type of trigger register
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* AES trigger register
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*/
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typedef union {
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struct {
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/** trigger : WT; bitpos: [0]; default: 0;
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* Set this bit to start AES calculation.
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*/
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uint32_t trigger:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} aes_trigger_reg_t;
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/** Type of state register
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* AES state register
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*/
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typedef union {
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struct {
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/** state : RO; bitpos: [1:0]; default: 0;
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* Those bits shows AES status. For typical AES, 0: idle, 1: busy. For DMA-AES, 0:
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* idle, 1: busy, 2: calculation_done.
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*/
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uint32_t state:2;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} aes_state_reg_t;
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/** Type of dma_enable register
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* DMA-AES working mode register
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*/
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typedef union {
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struct {
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/** dma_enable : R/W; bitpos: [0]; default: 0;
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* 1'b0: typical AES working mode, 1'b1: DMA-AES working mode.
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*/
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uint32_t dma_enable:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} aes_dma_enable_reg_t;
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/** Type of dma_exit register
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* AES-DMA exit config
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*/
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typedef union {
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struct {
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/** dma_exit : WT; bitpos: [0]; default: 0;
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* Set this register to leave calculation done stage. Recommend to use it after
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* software finishes reading DMA's output buffer.
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*/
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uint32_t dma_exit:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} aes_dma_exit_reg_t;
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/** Group: memory type */
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/** Group: interrupt register */
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/** Type of int_clear register
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* AES Interrupt clear register
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*/
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typedef union {
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struct {
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/** int_clear : WT; bitpos: [0]; default: 0;
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* Set this bit to clear the AES interrupt.
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*/
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uint32_t int_clear:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} aes_int_clear_reg_t;
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/** Type of int_ena register
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* AES Interrupt enable register
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*/
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typedef union {
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struct {
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/** int_ena : R/W; bitpos: [0]; default: 0;
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* Set this bit to enable interrupt that occurs when DMA-AES calculation is done.
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*/
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uint32_t int_ena:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} aes_int_ena_reg_t;
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/** Group: Version control register */
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/** Type of date register
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* AES version control register
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*/
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typedef union {
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struct {
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/** date : R/W; bitpos: [29:0]; default: 538513936;
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* This bits stores the version information of AES.
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*/
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uint32_t date:30;
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uint32_t reserved_30:2;
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};
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uint32_t val;
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} aes_date_reg_t;
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typedef struct {
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volatile aes_key_0_reg_t key_0;
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volatile aes_key_1_reg_t key_1;
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volatile aes_key_2_reg_t key_2;
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volatile aes_key_3_reg_t key_3;
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volatile aes_key_4_reg_t key_4;
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volatile aes_key_5_reg_t key_5;
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volatile aes_key_6_reg_t key_6;
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volatile aes_key_7_reg_t key_7;
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volatile aes_text_in_0_reg_t text_in_0;
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volatile aes_text_in_1_reg_t text_in_1;
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volatile aes_text_in_2_reg_t text_in_2;
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volatile aes_text_in_3_reg_t text_in_3;
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volatile aes_text_out_0_reg_t text_out_0;
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volatile aes_text_out_1_reg_t text_out_1;
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volatile aes_text_out_2_reg_t text_out_2;
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volatile aes_text_out_3_reg_t text_out_3;
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volatile aes_mode_reg_t mode;
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uint32_t reserved_044;
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volatile aes_trigger_reg_t trigger;
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volatile aes_state_reg_t state;
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volatile uint32_t iv[4];
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volatile uint32_t h[4];
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volatile uint32_t j0[4];
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volatile uint32_t t0[4];
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volatile aes_dma_enable_reg_t dma_enable;
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volatile aes_block_mode_reg_t block_mode;
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volatile aes_block_num_reg_t block_num;
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volatile aes_inc_sel_reg_t inc_sel;
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uint32_t reserved_0a0[3];
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volatile aes_int_clear_reg_t int_clear;
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volatile aes_int_ena_reg_t int_ena;
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volatile aes_date_reg_t date;
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volatile aes_dma_exit_reg_t dma_exit;
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} aes_dev_t;
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#ifndef __cplusplus
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_Static_assert(sizeof(aes_dev_t) == 0xbc, "Invalid size of aes_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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