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234 lines
6.2 KiB
C
234 lines
6.2 KiB
C
/**
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** RSA_M_MEM register
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* Represents M
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*/
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#define RSA_M_MEM_REG (DR_REG_RSA_BASE + 0x0)
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#define RSA_M_MEM_SIZE_BYTES 16
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/** RSA_Z_MEM register
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* Represents Z
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*/
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#define RSA_Z_MEM_REG (DR_REG_RSA_BASE + 0x200)
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#define RSA_Z_MEM_SIZE_BYTES 16
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/** RSA_Y_MEM register
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* Represents Y
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*/
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#define RSA_Y_MEM_REG (DR_REG_RSA_BASE + 0x400)
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#define RSA_Y_MEM_SIZE_BYTES 16
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/** RSA_X_MEM register
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* Represents X
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*/
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#define RSA_X_MEM_REG (DR_REG_RSA_BASE + 0x600)
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#define RSA_X_MEM_SIZE_BYTES 16
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/** RSA_M_PRIME_REG register
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* Represents M’
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*/
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#define RSA_M_PRIME_REG (DR_REG_RSA_BASE + 0x800)
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/** RSA_M_PRIME : R/W; bitpos: [31:0]; default: 0;
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* Represents M’
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*/
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#define RSA_M_PRIME 0xFFFFFFFFU
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#define RSA_M_PRIME_M (RSA_M_PRIME_V << RSA_M_PRIME_S)
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#define RSA_M_PRIME_V 0xFFFFFFFFU
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#define RSA_M_PRIME_S 0
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/** RSA_MODE_REG register
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* Configures RSA length
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*/
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#define RSA_MODE_REG (DR_REG_RSA_BASE + 0x804)
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/** RSA_MODE : R/W; bitpos: [6:0]; default: 0;
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* Configures the RSA length.
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*/
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#define RSA_MODE 0x0000007FU
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#define RSA_MODE_M (RSA_MODE_V << RSA_MODE_S)
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#define RSA_MODE_V 0x0000007FU
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#define RSA_MODE_S 0
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/** RSA_QUERY_CLEAN_REG register
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* RSA clean register
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*/
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#define RSA_QUERY_CLEAN_REG (DR_REG_RSA_BASE + 0x808)
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/** RSA_QUERY_CLEAN : RO; bitpos: [0]; default: 0;
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* Represents whether or not the RSA memory completes initialization.
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*
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* 0: Not complete
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*
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* 1: Completed
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*
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*/
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#define RSA_QUERY_CLEAN (BIT(0))
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#define RSA_QUERY_CLEAN_M (RSA_QUERY_CLEAN_V << RSA_QUERY_CLEAN_S)
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#define RSA_QUERY_CLEAN_V 0x00000001U
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#define RSA_QUERY_CLEAN_S 0
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/** RSA_SET_START_MODEXP_REG register
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* Starts modular exponentiation
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*/
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#define RSA_SET_START_MODEXP_REG (DR_REG_RSA_BASE + 0x80c)
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/** RSA_SET_START_MODEXP : WT; bitpos: [0]; default: 0;
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* Configure whether or not to start the modular exponentiation.
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*
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* 0: No effect
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*
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* 1: Start
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*
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*/
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#define RSA_SET_START_MODEXP (BIT(0))
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#define RSA_SET_START_MODEXP_M (RSA_SET_START_MODEXP_V << RSA_SET_START_MODEXP_S)
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#define RSA_SET_START_MODEXP_V 0x00000001U
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#define RSA_SET_START_MODEXP_S 0
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/** RSA_SET_START_MODMULT_REG register
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* Starts modular multiplication
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*/
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#define RSA_SET_START_MODMULT_REG (DR_REG_RSA_BASE + 0x810)
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/** RSA_SET_START_MODMULT : WT; bitpos: [0]; default: 0;
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* Configure whether or not to start the modular multiplication.
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*
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* 0: No effect
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*
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* 1: Start
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*
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*/
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#define RSA_SET_START_MODMULT (BIT(0))
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#define RSA_SET_START_MODMULT_M (RSA_SET_START_MODMULT_V << RSA_SET_START_MODMULT_S)
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#define RSA_SET_START_MODMULT_V 0x00000001U
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#define RSA_SET_START_MODMULT_S 0
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/** RSA_SET_START_MULT_REG register
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* Starts multiplication
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*/
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#define RSA_SET_START_MULT_REG (DR_REG_RSA_BASE + 0x814)
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/** RSA_SET_START_MULT : WT; bitpos: [0]; default: 0;
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* Configure whether or not to start the multiplication.
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*
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* 0: No effect
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*
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* 1: Start
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*
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*/
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#define RSA_SET_START_MULT (BIT(0))
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#define RSA_SET_START_MULT_M (RSA_SET_START_MULT_V << RSA_SET_START_MULT_S)
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#define RSA_SET_START_MULT_V 0x00000001U
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#define RSA_SET_START_MULT_S 0
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/** RSA_QUERY_IDLE_REG register
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* Represents the RSA status
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*/
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#define RSA_QUERY_IDLE_REG (DR_REG_RSA_BASE + 0x818)
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/** RSA_QUERY_IDLE : RO; bitpos: [0]; default: 0;
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* Represents the RSA status.
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*
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* 0: Busy
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*
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* 1: Idle
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*
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*/
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#define RSA_QUERY_IDLE (BIT(0))
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#define RSA_QUERY_IDLE_M (RSA_QUERY_IDLE_V << RSA_QUERY_IDLE_S)
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#define RSA_QUERY_IDLE_V 0x00000001U
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#define RSA_QUERY_IDLE_S 0
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/** RSA_INT_CLR_REG register
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* Clears RSA interrupt
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*/
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#define RSA_INT_CLR_REG (DR_REG_RSA_BASE + 0x81c)
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/** RSA_CLEAR_INTERRUPT : WT; bitpos: [0]; default: 0;
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* Write 1 to clear the RSA interrupt.
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*/
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#define RSA_CLEAR_INTERRUPT (BIT(0))
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#define RSA_CLEAR_INTERRUPT_M (RSA_CLEAR_INTERRUPT_V << RSA_CLEAR_INTERRUPT_S)
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#define RSA_CLEAR_INTERRUPT_V 0x00000001U
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#define RSA_CLEAR_INTERRUPT_S 0
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/** RSA_CONSTANT_TIME_REG register
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* Configures the constant_time option
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*/
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#define RSA_CONSTANT_TIME_REG (DR_REG_RSA_BASE + 0x820)
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/** RSA_CONSTANT_TIME : R/W; bitpos: [0]; default: 1;
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* Configures the constant_time option.
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*
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* 0: Acceleration
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*
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* 1: No acceleration (default)
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*
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*/
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#define RSA_CONSTANT_TIME (BIT(0))
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#define RSA_CONSTANT_TIME_M (RSA_CONSTANT_TIME_V << RSA_CONSTANT_TIME_S)
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#define RSA_CONSTANT_TIME_V 0x00000001U
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#define RSA_CONSTANT_TIME_S 0
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/** RSA_SEARCH_ENABLE_REG register
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* Configures the search option
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*/
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#define RSA_SEARCH_ENABLE_REG (DR_REG_RSA_BASE + 0x824)
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/** RSA_SEARCH_ENABLE : R/W; bitpos: [0]; default: 0;
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* Configure the search option.
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*
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* 0: No acceleration (default)
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*
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* 1: Acceleration
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*
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* This option should be used together with RSA_SEARCH_POS.
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*/
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#define RSA_SEARCH_ENABLE (BIT(0))
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#define RSA_SEARCH_ENABLE_M (RSA_SEARCH_ENABLE_V << RSA_SEARCH_ENABLE_S)
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#define RSA_SEARCH_ENABLE_V 0x00000001U
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#define RSA_SEARCH_ENABLE_S 0
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/** RSA_SEARCH_POS_REG register
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* Configures the search position
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*/
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#define RSA_SEARCH_POS_REG (DR_REG_RSA_BASE + 0x828)
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/** RSA_SEARCH_POS : R/W; bitpos: [11:0]; default: 0;
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* Configures the starting address to start search. This field should be used together
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* with RSA_SEARCH_ENABLE. The field is only valid when RSA_SEARCH_ENABLE is high.
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*/
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#define RSA_SEARCH_POS 0x00000FFFU
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#define RSA_SEARCH_POS_M (RSA_SEARCH_POS_V << RSA_SEARCH_POS_S)
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#define RSA_SEARCH_POS_V 0x00000FFFU
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#define RSA_SEARCH_POS_S 0
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/** RSA_INT_ENA_REG register
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* Enables the RSA interrupt
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*/
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#define RSA_INT_ENA_REG (DR_REG_RSA_BASE + 0x82c)
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/** RSA_INT_ENA : R/W; bitpos: [0]; default: 0;
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* Write 1 to enable the RSA interrupt.
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*/
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#define RSA_INT_ENA (BIT(0))
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#define RSA_INT_ENA_M (RSA_INT_ENA_V << RSA_INT_ENA_S)
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#define RSA_INT_ENA_V 0x00000001U
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#define RSA_INT_ENA_S 0
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/** RSA_DATE_REG register
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* Version control register
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*/
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#define RSA_DATE_REG (DR_REG_RSA_BASE + 0x830)
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/** RSA_DATE : R/W; bitpos: [29:0]; default: 538969624;
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* Version control register.
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*/
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#define RSA_DATE 0x3FFFFFFFU
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#define RSA_DATE_M (RSA_DATE_V << RSA_DATE_S)
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#define RSA_DATE_V 0x3FFFFFFFU
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#define RSA_DATE_S 0
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#ifdef __cplusplus
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}
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#endif
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