mirror of
https://github.com/espressif/esp-idf.git
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123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <esp_types.h>
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#include <stdio.h>
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#include "sdkconfig.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "esp_intr_alloc.h"
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#include "esp_cpu.h"
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#include "unity.h"
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#include "test_utils.h"
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#if CONFIG_IDF_TARGET_ARCH_XTENSA
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#include "xtensa/hal.h"
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#include "freertos/xtensa_api.h"
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#define TEST_SET_INT_MASK(mask) xt_set_intset(mask)
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#define TEST_CLR_INT_MASK(mask) xt_set_intclear(mask)
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#elif CONFIG_IDF_TARGET_ARCH_RISCV
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#include "riscv/interrupt.h"
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#define TEST_SET_INT_MASK(mask) esprv_intc_int_enable(mask)
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#define TEST_CLR_INT_MASK(mask) esprv_intc_int_disable(mask)
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#endif
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#ifndef __riscv // TODO: IDF-4416
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#define SW_ISR_LEVEL_1 7
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static SemaphoreHandle_t sync;
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static SemaphoreHandle_t end_sema;
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static uint32_t cycle_before_trigger;
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static uint32_t cycle_before_exit;
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static uint32_t delta_enter_cycles = 0;
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static uint32_t delta_exit_cycles = 0;
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static void software_isr_using_parameter_vportyield(void *arg) {
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(void)arg;
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BaseType_t yield;
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delta_enter_cycles += esp_cpu_get_cycle_count() - cycle_before_trigger;
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TEST_CLR_INT_MASK(1 << SW_ISR_LEVEL_1);
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xSemaphoreGiveFromISR(sync, &yield);
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portYIELD_FROM_ISR(yield);
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cycle_before_exit = esp_cpu_get_cycle_count();
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}
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static void software_isr_using_no_argument_vportyield(void *arg) {
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(void)arg;
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BaseType_t yield;
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delta_enter_cycles += esp_cpu_get_cycle_count() - cycle_before_trigger;
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TEST_CLR_INT_MASK(1 << SW_ISR_LEVEL_1);
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xSemaphoreGiveFromISR(sync, &yield);
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if(yield) {
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portYIELD_FROM_ISR();
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}
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cycle_before_exit = esp_cpu_get_cycle_count();
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}
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static void test_task(void *arg) {
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(void) arg;
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for(int i = 0;i < 10000; i++) {
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cycle_before_trigger = esp_cpu_get_cycle_count();
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TEST_SET_INT_MASK(1 << SW_ISR_LEVEL_1);
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xSemaphoreTake(sync, portMAX_DELAY);
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delta_exit_cycles += esp_cpu_get_cycle_count() - cycle_before_exit;
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}
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delta_enter_cycles /= 10000;
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delta_exit_cycles /= 10000;
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xSemaphoreGive(end_sema);
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vTaskDelete(NULL);
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}
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TEST_CASE("isr latency test vport-yield-from-isr with no parameter", "[freertos] [ignore]")
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{
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intr_handle_t handle;
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esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE, ESP_INTR_FLAG_LEVEL1, &software_isr_using_no_argument_vportyield, NULL, &handle);
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TEST_ASSERT_EQUAL_HEX32(ESP_OK, err);
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sync = xSemaphoreCreateBinary();
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TEST_ASSERT(sync != NULL);
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end_sema = xSemaphoreCreateBinary();
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TEST_ASSERT(end_sema != NULL);
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xTaskCreatePinnedToCore(test_task, "tst" , 4096, NULL, configMAX_PRIORITIES - 1, NULL, 0);
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vTaskDelay(100);
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BaseType_t result = xSemaphoreTake(end_sema, portMAX_DELAY);
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TEST_ASSERT_EQUAL_HEX32(pdTRUE, result);
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TEST_PERFORMANCE_LESS_THAN(ISR_ENTER_CYCLES, "%d cycles" ,delta_enter_cycles);
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TEST_PERFORMANCE_LESS_THAN(ISR_EXIT_CYCLES, "%d cycles" ,delta_exit_cycles);
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esp_intr_free(handle);
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}
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TEST_CASE("isr latency test vport-yield-from-isr with parameter", "[freertos][ignore]")
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{
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intr_handle_t handle;
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esp_err_t err = esp_intr_alloc(ETS_INTERNAL_SW0_INTR_SOURCE, ESP_INTR_FLAG_LEVEL1, &software_isr_using_parameter_vportyield, NULL, &handle);
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TEST_ASSERT_EQUAL_HEX32(ESP_OK, err);
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sync = xSemaphoreCreateBinary();
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TEST_ASSERT(sync != NULL);
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end_sema = xSemaphoreCreateBinary();
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TEST_ASSERT(end_sema != NULL);
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xTaskCreatePinnedToCore(test_task, "tst" , 4096, NULL, configMAX_PRIORITIES - 1, NULL, 0);
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BaseType_t result = xSemaphoreTake(end_sema, portMAX_DELAY);
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TEST_ASSERT_EQUAL_HEX32(pdTRUE, result);
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TEST_PERFORMANCE_LESS_THAN(ISR_ENTER_CYCLES, "%d cycles" ,delta_enter_cycles);
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TEST_PERFORMANCE_LESS_THAN(ISR_EXIT_CYCLES, "%d cycles" ,delta_exit_cycles);
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esp_intr_free(handle);
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}
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#endif // __riscv
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