mirror of
https://github.com/espressif/esp-idf.git
synced 2024-09-21 06:56:11 -04:00
2d44dc1eed
This commit gives basic mmu driver framework. Now it is able to maintain mmu virtual address usage on esp32, esp32s2 and esp32s3. Usage to external virtual address should rely on mmu functions to know which address range is available, instead of hardcoded. This commit also improves psram memory that is added to the heap allocator. Now it's added to the heap, according to the memory alignment. Closes https://github.com/espressif/esp-idf/issues/8295
72 lines
1.8 KiB
C
72 lines
1.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stddef.h>
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#include <stdbool.h>
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Check if the pointer is on PSRAM
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*
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* @param[in] p The pointer to check
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*
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* @return
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* - False: the pointer isn't on PSRAM, or PSRAM isn't initialised successfully
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* - True: the pointer is on PSRAM
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*/
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bool esp_psram_check_ptr_addr(const void *p);
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/**
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* @brief Add the initialized PSRAM to the heap allocator.
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*
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* @return
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* - ESP_OK: On success
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* Other error type, see `heap_caps_add_region`.
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*/
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esp_err_t esp_psram_extram_add_to_heap_allocator(void);
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/**
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* @brief Reserve a pool of internal memory for specific DMA/internal allocations
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*
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* @param size Size of reserved pool in bytes
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*
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* @return
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* - ESP_OK: On success
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* - ESP_ERR_NO_MEM: When no memory available for pool
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*/
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esp_err_t esp_psram_extram_reserve_dma_pool(size_t size);
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/**
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* @brief Memory test for PSRAM. Should be called after PSRAM is initialized and
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* (in case of a dual-core system) the app CPU is online. This test overwrites the
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* memory with crap, so do not call after e.g. the heap allocator has stored important
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* stuff in PSRAM.
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*
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* @return true on success, false on failed memory test
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*/
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bool esp_psram_extram_test(void);
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#if CONFIG_IDF_TARGET_ESP32
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/**
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* @brief Force a writeback of the data in the PSRAM cache. This is to be called whenever
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* cache is disabled, because disabling cache on the ESP32 discards the data in the PSRAM
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* cache.
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*
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* This is meant for use from within the SPI flash code.
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*/
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void esp_psram_extram_writeback_cache(void);
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#endif
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#ifdef __cplusplus
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}
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#endif
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