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223 lines
9.5 KiB
C
223 lines
9.5 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in soc/include/hal/readme.md
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******************************************************************************/
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// The HAL layer for SPI master (common part)
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// SPI HAL usages:
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// 1. initialize the bus
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// 2. initialize the DMA descriptors if DMA used
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// 3. setup the clock speed (since this takes long time)
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// 4. call setup_device to update parameters for the specific device
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// 5. call setup_trans to update parameters for the specific transaction
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// 6. prepare data to send, and prepare the receiving buffer
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// 7. trigger user defined SPI transaction to start
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// 8. wait until the user transaction is done
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// 9. fetch the received data
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// Parameter to be updated only during ``setup_device`` will be highlighted in the
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// field comments.
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#pragma once
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#include "hal/spi_ll.h"
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#include <esp_err.h>
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#include "soc/lldesc.h"
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/**
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* Timing configuration structure that should be calculated by
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* ``spi_hal_setup_clock`` at initialization and hold. Filled into the
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* ``timing_conf`` member of the context of HAL before setup a device.
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*/
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typedef struct {
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spi_ll_clock_val_t clock_reg; ///< Register value used by the LL layer
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int timing_dummy; ///< Extra dummy needed to compensate the timing
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int timing_miso_delay; ///< Extra miso delay clocks to compensate the timing
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} spi_hal_timing_conf_t;
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/**
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* Context that should be maintained by both the driver and the HAL.
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*/
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typedef struct {
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/* configured by driver at initialization, don't touch */
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spi_dev_t *hw; ///< Beginning address of the peripheral registers.
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/* should be configured by driver at initialization */
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lldesc_t *dmadesc_tx; /**< Array of DMA descriptor used by the TX DMA.
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* The amount should be larger than dmadesc_n. The driver should ensure that
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* the data to be sent is shorter than the descriptors can hold.
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*/
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lldesc_t *dmadesc_rx; /**< Array of DMA descriptor used by the RX DMA.
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* The amount should be larger than dmadesc_n. The driver should ensure that
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* the data to be sent is shorter than the descriptors can hold.
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*/
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int dmadesc_n; ///< The amount of descriptors of both ``dmadesc_tx`` and ``dmadesc_rx`` that the HAL can use.
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/*
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* Device specific, all these parameters will be updated to the peripheral
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* only when ``spi_hal_setup_device``. They may not get updated when
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* ``spi_hal_setup_trans``.
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*/
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int mode; ///< SPI mode, device specific
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int cs_setup; ///< Setup time of CS active edge before the first SPI clock, device specific
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int cs_hold; ///< Hold time of CS inactive edge after the last SPI clock, device specific
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int cs_pin_id; ///< CS pin to use, 0-2, otherwise all the CS pins are not used. Device specific
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spi_hal_timing_conf_t *timing_conf; /**< Pointer to an structure holding
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* the pre-calculated timing configuration for the device at initialization,
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* device specific
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*/
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struct {
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uint32_t sio : 1; ///< Whether to use SIO mode, device specific
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uint32_t half_duplex : 1; ///< Whether half duplex mode is used, device specific
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uint32_t tx_lsbfirst : 1; ///< Whether LSB is sent first for TX data, device specific
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uint32_t rx_lsbfirst : 1; ///< Whether LSB is received first for RX data, device specific
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uint32_t dma_enabled : 1; ///< Whether the DMA is enabled, do not update after initialization
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uint32_t no_compensate : 1; ///< No need to add dummy to compensate the timing, device specific
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#ifdef SOC_SPI_SUPPORT_AS_CS
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uint32_t as_cs : 1; ///< Whether to toggle the CS while the clock toggles, device specific
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#endif
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uint32_t positive_cs : 1; ///< Whether the postive CS feature is abled, device specific
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};//boolean configurations
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/*
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* Transaction specific (data), all these parameters will be updated to the
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* peripheral every transaction.
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*/
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uint16_t cmd; ///< Command value to be sent
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int cmd_bits; ///< Length (in bits) of the command phase
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int addr_bits; ///< Length (in bits) of the address phase
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int dummy_bits; ///< Base length (in bits) of the dummy phase. Note when the compensation is enabled, some extra dummy bits may be appended.
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int tx_bitlen; ///< TX length, in bits
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int rx_bitlen; ///< RX length, in bits
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uint64_t addr; ///< Address value to be sent
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uint8_t *send_buffer; ///< Data to be sent
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uint8_t *rcv_buffer; ///< Buffer to hold the receive data.
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spi_ll_io_mode_t io_mode; ///< IO mode of the master
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} spi_hal_context_t;
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/**
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* Init the peripheral and the context.
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*
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* @param hal Context of the HAL layer.
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* @param host_id Index of the SPI peripheral. 0 for SPI1, 1 for HSPI (SPI2) and 2 for VSPI (SPI3).
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*/
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void spi_hal_init(spi_hal_context_t *hal, int host_id);
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/**
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* Deinit the peripheral (and the context if needed).
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*
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* @param hal Context of the HAL layer.
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*/
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void spi_hal_deinit(spi_hal_context_t *hal);
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/**
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* Setup device-related configurations according to the settings in the context.
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*
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* @param hal Context of the HAL layer.
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*/
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void spi_hal_setup_device(const spi_hal_context_t *hal);
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/**
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* Setup transaction related configurations according to the settings in the context.
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*
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* @param hal Context of the HAL layer.
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*/
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void spi_hal_setup_trans(const spi_hal_context_t *hal);
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/**
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* Prepare the data for the current transaction.
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*
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* @param hal Context of the HAL layer.
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*/
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void spi_hal_prepare_data(const spi_hal_context_t *hal);
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/**
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* Trigger start a user-defined transaction.
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*
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* @param hal Context of the HAL layer.
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*/
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void spi_hal_user_start(const spi_hal_context_t *hal);
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/**
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* Check whether the transaction is done (trans_done is set).
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*
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* @param hal Context of the HAL layer.
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*/
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bool spi_hal_usr_is_done(const spi_hal_context_t *hal);
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/**
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* Post transaction operations, mainly fetch data from the buffer.
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*
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* @param hal Context of the HAL layer.
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*/
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void spi_hal_fetch_result(const spi_hal_context_t *hal);
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/*----------------------------------------------------------
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* Utils
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* ---------------------------------------------------------*/
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/**
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* Calculate the configuration of clock and timing. The configuration will be used when ``spi_hal_setup_device``.
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*
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* It is highly suggested to do this at initialization, since it takes long time.
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*
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* @param hal Context of the HAL layer.
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* @param speed_hz Desired frequency.
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* @param duty_cycle Desired duty cycle of SPI clock
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* @param use_gpio true if the GPIO matrix is used, otherwise false
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* @param input_delay_ns Maximum delay between SPI launch clock and the data to
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* be valid. This is used to compensate/calculate the maximum frequency
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* allowed. Left 0 if not known.
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* @param out_freq Output of the actual frequency, left NULL if not required.
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* @param timing_conf Output of the timing configuration.
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*
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* @return ESP_OK if desired is available, otherwise fail.
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*/
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esp_err_t spi_hal_cal_clock_conf(const spi_hal_context_t *hal, int speed_hz, int duty_cycle, bool use_gpio, int input_delay_ns, int *out_freq, spi_hal_timing_conf_t *timing_conf);
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/**
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* Get the frequency actual used.
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*
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* @param hal Context of the HAL layer.
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* @param fapb APB clock frequency.
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* @param hz Desired frequencyc.
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* @param duty_cycle Desired duty cycle.
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*/
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int spi_hal_master_cal_clock(int fapb, int hz, int duty_cycle);
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/**
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* Get the timing configuration for given parameters.
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*
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* @param eff_clk Actual SPI clock frequency
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* @param gpio_is_used true if the GPIO matrix is used, otherwise false.
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* @param input_delay_ns Maximum delay between SPI launch clock and the data to
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* be valid. This is used to compensate/calculate the maximum frequency
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* allowed. Left 0 if not known.
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* @param dummy_n Dummy cycles required to correctly read the data.
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* @param miso_delay_n suggested delay on the MISO line, in APB clocks.
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*/
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void spi_hal_cal_timing(int eff_clk, bool gpio_is_used, int input_delay_ns, int *dummy_n, int *miso_delay_n);
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/**
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* Get the maximum frequency allowed to read if no compensation is used.
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*
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* @param gpio_is_used true if the GPIO matrix is used, otherwise false.
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* @param input_delay_ns Maximum delay between SPI launch clock and the data to
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* be valid. This is used to compensate/calculate the maximum frequency
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* allowed. Left 0 if not known.
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*/
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int spi_hal_get_freq_limit(bool gpio_is_used, int input_delay_ns);
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