esp-idf/components/ulp/ulp_riscv
Sudeep Mohanty bc74cf808d feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts
This commit adds a Kconfig option, CONFIG_ULP_RISCV_INTERRUPT_ENABLE, to
enable interrupts on the ULP RISC-V core on the esp32s2 and esp32s3.
2024-02-21 11:45:06 +01:00
..
include fix(ulp): enable astyle linter and format ULP component 2024-01-22 11:43:38 +08:00
shared/include ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP. 2022-08-05 18:16:31 +08:00
ulp_core feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 2024-02-21 11:45:06 +01:00
ulp_riscv_i2c.c fix(ulp_riscv): Updated RTC I2C to use open-drain IOs 2024-01-30 14:54:45 +01:00
ulp_riscv_lock.c ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP. 2022-08-05 18:16:31 +08:00
ulp_riscv.c fix(ulp): enable astyle linter and format ULP component 2024-01-22 11:43:38 +08:00