mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
481 lines
13 KiB
C
481 lines
13 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <assert.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_timer.h"
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#include "esp_ds.h"
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#include "esp_crypto_lock.h"
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#include "esp_private/esp_crypto_lock_internal.h"
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#include "esp_hmac.h"
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#include "esp_memory_utils.h"
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#if CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/aes.h"
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#include "esp32s2/rom/sha.h"
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#include "esp32s2/rom/hmac.h"
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#include "soc/soc_memory_layout.h"
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#else /* CONFIG_IDF_TARGET_ESP32S2 */
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#include "esp_private/periph_ctrl.h"
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#include "hal/aes_ll.h"
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#include "hal/ds_hal.h"
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#include "hal/ds_ll.h"
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#include "hal/hmac_hal.h"
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#include "hal/hmac_ll.h"
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#include "hal/sha_ll.h"
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#endif /* !CONFIG_IDF_TARGET_ESP32S2 */
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#if CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32C6
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#include "esp32c6/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32C5
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#include "esp32c5/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32H2
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#include "esp32h2/rom/digital_signature.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32P4
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#include "esp32p4/rom/digital_signature.h"
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#endif
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struct esp_ds_context {
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const ets_ds_data_t *data;
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};
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/**
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* The vtask delay \c esp_ds_sign() is using while waiting for completion of the signing operation.
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*/
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#define ESP_DS_SIGN_TASK_DELAY_MS 10
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#define RSA_LEN_MAX ((SOC_RSA_MAX_BIT_LEN/8) - 1)
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/*
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* Check that the size of esp_ds_data_t and ets_ds_data_t is the same because both structs are converted using
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* raw casts.
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*/
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_Static_assert(sizeof(esp_ds_data_t) == sizeof(ets_ds_data_t),
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"The size and structure of esp_ds_data_t and ets_ds_data_t must match exactly, they're used in raw casts");
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/*
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* esp_digital_signature_length_t is used in esp_ds_data_t in contrast to ets_ds_data_t, where unsigned is used.
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* Check esp_digital_signature_length_t's width here because it's converted to unsigned using raw casts.
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*/
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_Static_assert(sizeof(esp_digital_signature_length_t) == sizeof(unsigned),
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"The size of esp_digital_signature_length_t and unsigned has to be the same");
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#ifdef CONFIG_IDF_TARGET_ESP32S2
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static void ds_acquire_enable(void)
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{
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/* Lock AES, SHA and RSA peripheral */
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esp_crypto_dma_lock_acquire();
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esp_crypto_mpi_lock_acquire();
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ets_hmac_enable();
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ets_ds_enable();
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}
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static void ds_disable_release(void)
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{
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ets_ds_disable();
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ets_hmac_disable();
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esp_crypto_mpi_lock_release();
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esp_crypto_dma_lock_release();
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}
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esp_err_t esp_ds_sign(const void *message,
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const esp_ds_data_t *data,
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hmac_key_id_t key_id,
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void *signature)
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{
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// Need to check signature here, otherwise the signature is only checked when the signing has finished and fails
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// but the signing isn't uninitialized and the mutex is still locked.
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if (!signature) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_ds_context_t *context;
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esp_err_t result = esp_ds_start_sign(message, data, key_id, &context);
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if (result != ESP_OK) {
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return result;
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}
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while (esp_ds_is_busy()) {
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vTaskDelay(ESP_DS_SIGN_TASK_DELAY_MS / portTICK_PERIOD_MS);
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}
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return esp_ds_finish_sign(signature, context);
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}
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esp_err_t esp_ds_start_sign(const void *message,
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const esp_ds_data_t *data,
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hmac_key_id_t key_id,
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esp_ds_context_t **esp_ds_ctx)
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{
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if (!message || !data || !esp_ds_ctx) {
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return ESP_ERR_INVALID_ARG;
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}
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if (key_id >= HMAC_KEY_MAX) {
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return ESP_ERR_INVALID_ARG;
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}
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if (!(data->rsa_length == ESP_DS_RSA_1024
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|| data->rsa_length == ESP_DS_RSA_2048
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|| data->rsa_length == ESP_DS_RSA_3072
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#if SOC_RSA_MAX_BIT_LEN == 4096
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|| data->rsa_length == ESP_DS_RSA_4096
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#endif
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)) {
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return ESP_ERR_INVALID_ARG;
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}
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ds_acquire_enable();
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// initiate hmac
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int r = ets_hmac_calculate_downstream(ETS_EFUSE_BLOCK_KEY0 + (ets_efuse_block_t) key_id,
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ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE);
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if (r != ETS_OK) {
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ds_disable_release();
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return ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL;
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}
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esp_ds_context_t *context = malloc(sizeof(esp_ds_context_t));
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if (!context) {
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ds_disable_release();
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return ESP_ERR_NO_MEM;
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}
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ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
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// initiate signing
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ets_ds_result_t result = ets_ds_start_sign(message, ds_data);
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// ETS_DS_INVALID_PARAM only happens if a parameter is NULL or data->rsa_length is wrong
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// We checked all of that already
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assert(result != ETS_DS_INVALID_PARAM);
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if (result == ETS_DS_INVALID_KEY) {
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ds_disable_release();
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free(context);
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return ESP_ERR_HW_CRYPTO_DS_INVALID_KEY;
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}
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context->data = (const ets_ds_data_t *)ds_data;
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*esp_ds_ctx = context;
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return ESP_OK;
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}
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bool esp_ds_is_busy(void)
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{
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return ets_ds_is_busy();
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}
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esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
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{
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if (!signature || !esp_ds_ctx) {
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return ESP_ERR_INVALID_ARG;
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}
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const ets_ds_data_t *ds_data = esp_ds_ctx->data;
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ets_ds_result_t result = ets_ds_finish_sign(signature, ds_data);
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esp_err_t return_value = ESP_OK;
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// we checked all the parameters
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assert(result != ETS_DS_INVALID_PARAM);
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if (result == ETS_DS_INVALID_DIGEST) {
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return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
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}
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if (result == ETS_DS_INVALID_PADDING) {
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return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING;
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}
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free(esp_ds_ctx);
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int res = ets_hmac_invalidate_downstream(ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE);
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assert(res == ETS_OK); // should not fail if called with correct purpose
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(void)res;
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ds_disable_release();
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return return_value;
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}
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esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
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const void *iv,
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const esp_ds_p_data_t *p_data,
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const void *key)
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{
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// p_data has to be valid, in internal memory and word aligned
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if (!p_data) {
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return ESP_ERR_INVALID_ARG;
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}
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assert(esp_ptr_internal(p_data) && esp_ptr_word_aligned(p_data));
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esp_err_t result = ESP_OK;
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esp_crypto_dma_lock_acquire();
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ets_aes_enable();
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ets_sha_enable();
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ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
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const ets_ds_p_data_t *ds_plain_data = (const ets_ds_p_data_t *) p_data;
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ets_ds_result_t ets_result = ets_ds_encrypt_params(ds_data, iv, ds_plain_data, key, ETS_DS_KEY_HMAC);
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if (ets_result == ETS_DS_INVALID_PARAM) {
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result = ESP_ERR_INVALID_ARG;
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}
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ets_sha_disable();
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ets_aes_disable();
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esp_crypto_dma_lock_release();
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return result;
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}
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#else /* !CONFIG_IDF_TARGET_ESP32S2 (targets other than esp32s2) */
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static void ds_acquire_enable(void)
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{
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esp_crypto_ds_lock_acquire();
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#if CONFIG_IDF_TARGET_ESP32S3
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esp_crypto_mpi_lock_acquire();
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#endif
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// We also enable SHA and HMAC here. SHA is used by HMAC, HMAC is used by DS.
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(true);
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hmac_ll_reset_register();
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}
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SHA_RCC_ATOMIC() {
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sha_ll_enable_bus_clock(true);
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sha_ll_reset_register();
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}
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DS_RCC_ATOMIC() {
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ds_ll_enable_bus_clock(true);
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ds_ll_reset_register();
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}
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hmac_hal_start();
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}
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static void ds_disable_release(void)
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{
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ds_hal_finish();
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DS_RCC_ATOMIC() {
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ds_ll_enable_bus_clock(false);
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}
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SHA_RCC_ATOMIC() {
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sha_ll_enable_bus_clock(false);
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}
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HMAC_RCC_ATOMIC() {
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hmac_ll_enable_bus_clock(false);
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}
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#if CONFIG_IDF_TARGET_ESP32S3
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esp_crypto_mpi_lock_release();
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#endif
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esp_crypto_ds_lock_release();
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}
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esp_err_t esp_ds_sign(const void *message,
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const esp_ds_data_t *data,
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hmac_key_id_t key_id,
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void *signature)
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{
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// Need to check signature here, otherwise the signature is only checked when the signing has finished and fails
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// but the signing isn't uninitialized and the mutex is still locked.
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if (!signature) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_ds_context_t *context;
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esp_err_t result = esp_ds_start_sign(message, data, key_id, &context);
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if (result != ESP_OK) {
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return result;
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}
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while (esp_ds_is_busy()) {
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vTaskDelay(ESP_DS_SIGN_TASK_DELAY_MS / portTICK_PERIOD_MS);
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}
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return esp_ds_finish_sign(signature, context);
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}
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esp_err_t esp_ds_start_sign(const void *message,
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const esp_ds_data_t *data,
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hmac_key_id_t key_id,
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esp_ds_context_t **esp_ds_ctx)
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{
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if (!message || !data || !esp_ds_ctx) {
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return ESP_ERR_INVALID_ARG;
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}
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if (key_id >= HMAC_KEY_MAX) {
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return ESP_ERR_INVALID_ARG;
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}
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if (!(data->rsa_length == ESP_DS_RSA_1024
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|| data->rsa_length == ESP_DS_RSA_2048
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|| data->rsa_length == ESP_DS_RSA_3072
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#if SOC_RSA_MAX_BIT_LEN == 4096
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|| data->rsa_length == ESP_DS_RSA_4096
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#endif
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)) {
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return ESP_ERR_INVALID_ARG;
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}
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ds_acquire_enable();
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// initiate hmac
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uint32_t conf_error = hmac_hal_configure(HMAC_OUTPUT_DS, key_id);
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if (conf_error) {
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ds_disable_release();
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return ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL;
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}
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ds_hal_start();
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// check encryption key from HMAC
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int64_t start_time = esp_timer_get_time();
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while (ds_ll_busy() != 0) {
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if ((esp_timer_get_time() - start_time) > SOC_DS_KEY_CHECK_MAX_WAIT_US) {
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ds_disable_release();
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return ESP_ERR_HW_CRYPTO_DS_INVALID_KEY;
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}
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}
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esp_ds_context_t *context = malloc(sizeof(esp_ds_context_t));
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if (!context) {
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ds_disable_release();
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return ESP_ERR_NO_MEM;
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}
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size_t rsa_len = (data->rsa_length + 1) * 4;
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ds_hal_write_private_key_params(data->c);
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ds_hal_configure_iv((uint32_t *)data->iv);
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ds_hal_write_message(message, rsa_len);
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// initiate signing
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ds_hal_start_sign();
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context->data = (const ets_ds_data_t *)data;
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*esp_ds_ctx = context;
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return ESP_OK;
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}
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bool esp_ds_is_busy(void)
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{
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return ds_hal_busy();
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}
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esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
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{
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if (!signature || !esp_ds_ctx) {
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return ESP_ERR_INVALID_ARG;
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}
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const esp_ds_data_t *data = (const esp_ds_data_t *)esp_ds_ctx->data;
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unsigned rsa_len = (data->rsa_length + 1) * 4;
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while (ds_hal_busy()) { }
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ds_signature_check_t sig_check_result = ds_hal_read_result((uint8_t *) signature, (size_t) rsa_len);
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esp_err_t return_value = ESP_OK;
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if (sig_check_result == DS_SIGNATURE_MD_FAIL || sig_check_result == DS_SIGNATURE_PADDING_AND_MD_FAIL) {
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return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
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}
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if (sig_check_result == DS_SIGNATURE_PADDING_FAIL) {
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return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING;
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}
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free(esp_ds_ctx);
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hmac_hal_clean();
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ds_disable_release();
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return return_value;
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}
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esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
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const void *iv,
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const esp_ds_p_data_t *p_data,
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const void *key)
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{
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if (!p_data) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_err_t result = ESP_OK;
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// The `esp_ds_encrypt_params` operation does not use the Digital Signature peripheral,
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// but just the AES and SHA peripherals, so acquiring locks just for these peripherals
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// would be enough rather than acquiring a lock for the Digital Signature peripheral.
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esp_crypto_sha_aes_lock_acquire();
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AES_RCC_ATOMIC() {
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aes_ll_enable_bus_clock(true);
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aes_ll_reset_register();
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}
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SHA_RCC_ATOMIC() {
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sha_ll_enable_bus_clock(true);
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sha_ll_reset_register();
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}
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ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
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const ets_ds_p_data_t *ds_plain_data = (const ets_ds_p_data_t *) p_data;
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ets_ds_result_t ets_result = ets_ds_encrypt_params(ds_data, iv, ds_plain_data, key, ETS_DS_KEY_HMAC);
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if (ets_result == ETS_DS_INVALID_PARAM) {
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result = ESP_ERR_INVALID_ARG;
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}
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SHA_RCC_ATOMIC() {
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sha_ll_enable_bus_clock(false);
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}
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AES_RCC_ATOMIC() {
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aes_ll_enable_bus_clock(false);
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}
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esp_crypto_sha_aes_lock_release();
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return result;
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}
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#endif
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