mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
b3f6cd08db
This change adds a set of menuconfig options to set custom UART#, baud rate, and pins, for console output. Setting happens in bootloader startup code for PRO CPU, and in application startup code for APP CPU. Ref. TW8146
473 lines
15 KiB
Plaintext
473 lines
15 KiB
Plaintext
menu "ESP32-specific config"
|
|
|
|
choice ESP32_DEFAULT_CPU_FREQ_MHZ
|
|
prompt "CPU frequency"
|
|
default ESP32_DEFAULT_CPU_FREQ_240
|
|
help
|
|
CPU frequency to be set on application startup.
|
|
|
|
config ESP32_DEFAULT_CPU_FREQ_80
|
|
bool "80 MHz"
|
|
config ESP32_DEFAULT_CPU_FREQ_160
|
|
bool "160 MHz"
|
|
config ESP32_DEFAULT_CPU_FREQ_240
|
|
bool "240 MHz"
|
|
endchoice
|
|
|
|
config ESP32_DEFAULT_CPU_FREQ_MHZ
|
|
int
|
|
default 80 if ESP32_DEFAULT_CPU_FREQ_80
|
|
default 160 if ESP32_DEFAULT_CPU_FREQ_160
|
|
default 240 if ESP32_DEFAULT_CPU_FREQ_240
|
|
|
|
#choice ESP32_WIFI_OR_BT
|
|
# prompt "Select stack to enable (WiFi or BT)"
|
|
# default ESP32_ENABLE_WIFI
|
|
# help
|
|
# Temporarily, WiFi and BT stacks can not be used at the same time.
|
|
# Select which stack to enable.
|
|
|
|
config ESP32_ENABLE_STACK_WIFI
|
|
bool "WiFi"
|
|
select WIFI_ENABLED if ESP32_ENABLE_STACK_WIFI
|
|
config ESP32_ENABLE_STACK_BT
|
|
bool "BT"
|
|
select MEMMAP_BT if ESP32_ENABLE_STACK_BT
|
|
select BT_ENABLED if ESP32_ENABLE_STACK_BT
|
|
#config ESP32_ENABLE_STACK_NONE
|
|
# bool "None"
|
|
#endchoice
|
|
|
|
config SW_COEXIST_ENABLE
|
|
bool "Software do control of wifi/bt coexisit"
|
|
depends on ESP32_ENABLE_STACK_BT && ESP32_ENABLE_STACK_WIFI
|
|
default "n"
|
|
help
|
|
Software do something control of wifi/bt coexist. For some heavy traffic senario,
|
|
do sotware coexist, may be better.
|
|
|
|
config MEMMAP_BT
|
|
bool
|
|
depends on ESP32_ENABLE_STACK_BT
|
|
help
|
|
The Bluetooth stack uses memory that cannot be used as generic memory anymore. This
|
|
reserves the space for that within the memory map of the compiled binary.
|
|
This option is required to enable BT stack.
|
|
Temporarily, this option is not compatible with WiFi stack.
|
|
|
|
config MEMMAP_SMP
|
|
bool "Reserve memory for two cores"
|
|
default "y"
|
|
help
|
|
The ESP32 contains two cores. If you plan to only use one, you can disable this item
|
|
to save some memory. (ToDo: Make this automatically depend on unicore support)
|
|
|
|
config MEMMAP_TRACEMEM
|
|
bool "Use TRAX tracing feature"
|
|
default "n"
|
|
help
|
|
The ESP32 contains a feature which allows you to trace the execution path the processor
|
|
has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
|
|
of memory that can't be used for general purposes anymore. Disable this if you do not know
|
|
what this is.
|
|
|
|
config MEMMAP_TRACEMEM_TWOBANKS
|
|
bool "Reserve memory for tracing both pro as well as app cpu execution"
|
|
default "n"
|
|
depends on MEMMAP_TRACEMEM && MEMMAP_SMP
|
|
help
|
|
The ESP32 contains a feature which allows you to trace the execution path the processor
|
|
has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
|
|
of memory that can't be used for general purposes anymore. Disable this if you do not know
|
|
what this is.
|
|
|
|
|
|
# Memory to reverse for trace, used in linker script
|
|
config TRACEMEM_RESERVE_DRAM
|
|
hex
|
|
default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
|
|
default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
|
|
default 0x0
|
|
|
|
# Not implemented and/or needs new silicon rev to work
|
|
config MEMMAP_SPISRAM
|
|
bool "Use external SPI SRAM chip as main memory"
|
|
depends on ESP32_NEEDS_NEW_SILICON_REV
|
|
default "n"
|
|
help
|
|
The ESP32 can control an external SPI SRAM chip, adding the memory it contains to the
|
|
main memory map. Enable this if you have this hardware and want to use it in the same
|
|
way as on-chip RAM.
|
|
|
|
config WIFI_ENABLED
|
|
bool
|
|
default "y"
|
|
depends on ESP32_ENABLE_STACK_WIFI
|
|
help
|
|
This compiles in the low-level WiFi stack.
|
|
|
|
Temporarily, this option is not compatible with BT stack.
|
|
|
|
config SYSTEM_EVENT_QUEUE_SIZE
|
|
int "System event queue size"
|
|
default 32
|
|
help
|
|
Config system event queue size in different application.
|
|
|
|
config SYSTEM_EVENT_TASK_STACK_SIZE
|
|
int "Event loop task stack size"
|
|
default 2048
|
|
help
|
|
Config system event task stack size in different application.
|
|
|
|
|
|
config MAIN_TASK_STACK_SIZE
|
|
int "Main task stack size"
|
|
default 4096
|
|
help
|
|
Config system event task stack size in different application.
|
|
|
|
|
|
config NEWLIB_STDOUT_ADDCR
|
|
bool "Standard-out output adds carriage return before newline"
|
|
default y
|
|
help
|
|
Most people are used to end their printf strings with a newline. If this
|
|
is sent as is to the serial port, most terminal programs will only move the
|
|
cursor one line down, not also move it to the beginning of the line. This
|
|
is usually done by an added CR character. Enabling this will make the
|
|
standard output code automatically add a CR character before a LF.
|
|
|
|
choice CONSOLE_UART
|
|
prompt "UART for console output"
|
|
default CONSOLE_UART_DEFAULT
|
|
help
|
|
Select whether to use UART for console output (through stdout and stderr).
|
|
- Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
|
|
- If "Custom" is selected, UART0 or UART1 can be chosen,
|
|
and any pins can be selected.
|
|
- If "None" is selected, there will be no console output on any UART, except
|
|
for initial output from ROM bootloader. This output can be further suppressed by
|
|
bootstrapping GPIO13 pin to low logic level.
|
|
|
|
config CONSOLE_UART_DEFAULT
|
|
bool "Default: UART0, TX=GPIO1, RX=GPIO3"
|
|
config CONSOLE_UART_CUSTOM
|
|
bool "Custom"
|
|
config CONSOLE_UART_NONE
|
|
bool "None"
|
|
endchoice
|
|
|
|
choice CONSOLE_UART_NUM
|
|
prompt "UART peripheral to use for console output (0-1)"
|
|
depends on CONSOLE_UART_CUSTOM
|
|
default CONSOLE_UART_CUSTOM_NUM_0
|
|
help
|
|
Due of a ROM bug, UART2 is not supported for console output
|
|
via ets_printf.
|
|
|
|
config CONSOLE_UART_CUSTOM_NUM_0
|
|
bool "UART0"
|
|
config CONSOLE_UART_CUSTOM_NUM_1
|
|
bool "UART1"
|
|
endchoice
|
|
|
|
config CONSOLE_UART_NUM
|
|
int
|
|
default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
|
|
default 0 if CONSOLE_UART_CUSTOM_NUM_0
|
|
default 1 if CONSOLE_UART_CUSTOM_NUM_1
|
|
|
|
config CONSOLE_UART_TX_GPIO
|
|
int "UART TX on GPIO#"
|
|
depends on CONSOLE_UART_CUSTOM
|
|
range 0 33
|
|
default 19
|
|
|
|
config CONSOLE_UART_RX_GPIO
|
|
int "UART RX on GPIO#"
|
|
depends on CONSOLE_UART_CUSTOM
|
|
range 0 39
|
|
default 21
|
|
|
|
config CONSOLE_UART_BAUDRATE
|
|
int "UART console baud rate"
|
|
depends on !CONSOLE_UART_NONE
|
|
default 115200
|
|
range 1200 4000000
|
|
|
|
config ULP_COPROC_ENABLED
|
|
bool "Enable Ultra Low Power (ULP) Coprocessor"
|
|
default "n"
|
|
help
|
|
Set to 'y' if you plan to load a firmware for the coprocessor.
|
|
|
|
If this option is enabled, further coprocessor configuration will appear in the Components menu.
|
|
|
|
config ULP_COPROC_RESERVE_MEM
|
|
int "RTC slow memory reserved for coprocessor"
|
|
default 512
|
|
range 32 8192
|
|
depends on ULP_COPROC_ENABLED
|
|
help
|
|
Bytes of memory to reserve for ULP coprocessor firmware & data.
|
|
|
|
Data is reserved at the beginning of RTC slow memory.
|
|
|
|
# Set CONFIG_ULP_COPROC_RESERVE_MEM to 0 if ULP is disabled
|
|
config ULP_COPROC_RESERVE_MEM
|
|
int
|
|
default 0
|
|
depends on !ULP_COPROC_ENABLED
|
|
|
|
|
|
choice ESP32_PANIC
|
|
prompt "Panic handler behaviour"
|
|
default ESP32_PANIC_PRINT_REBOOT
|
|
help
|
|
If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
|
|
invoked. Configure the panic handlers action here.
|
|
|
|
config ESP32_PANIC_PRINT_HALT
|
|
bool "Print registers and halt"
|
|
help
|
|
Outputs the relevant registers over the serial port and halt the
|
|
processor. Needs a manual reset to restart.
|
|
|
|
config ESP32_PANIC_PRINT_REBOOT
|
|
bool "Print registers and reboot"
|
|
help
|
|
Outputs the relevant registers over the serial port and immediately
|
|
reset the processor.
|
|
|
|
config ESP32_PANIC_SILENT_REBOOT
|
|
bool "Silent reboot"
|
|
help
|
|
Just resets the processor without outputting anything
|
|
|
|
config ESP32_PANIC_GDBSTUB
|
|
bool "Invoke GDBStub"
|
|
help
|
|
Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
|
|
of the crash.
|
|
endchoice
|
|
|
|
config ESP32_DEBUG_OCDAWARE
|
|
bool "Make exception and panic handlers JTAG/OCD aware"
|
|
default y
|
|
help
|
|
The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
|
|
instead of panicking, have the debugger stop on the offending instruction.
|
|
|
|
|
|
config INT_WDT
|
|
bool "Interrupt watchdog"
|
|
default y
|
|
help
|
|
This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
|
|
either because a task turned off interrupts and did not turn them on for a long time, or because an
|
|
interrupt handler did not return. It will try to invoke the panic handler first and failing that
|
|
reset the SoC.
|
|
|
|
config INT_WDT_TIMEOUT_MS
|
|
int "Interrupt watchdog timeout (ms)"
|
|
depends on INT_WDT
|
|
default 300
|
|
range 10 10000
|
|
help
|
|
The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
|
|
|
|
config INT_WDT_CHECK_CPU1
|
|
bool "Also watch CPU1 tick interrupt"
|
|
depends on INT_WDT && !FREERTOS_UNICORE
|
|
default y
|
|
help
|
|
Also detect if interrupts on CPU 1 are disabled for too long.
|
|
|
|
config TASK_WDT
|
|
bool "Task watchdog"
|
|
default y
|
|
help
|
|
This watchdog timer can be used to make sure individual tasks are still running.
|
|
|
|
config TASK_WDT_PANIC
|
|
bool "Invoke panic handler when Task Watchdog is triggered"
|
|
depends on TASK_WDT
|
|
default n
|
|
help
|
|
Normally, the Task Watchdog will only print out a warning if it detects it has not
|
|
been fed. If this is enabled, it will invoke the panic handler instead, which
|
|
can then halt or reboot the chip.
|
|
|
|
config TASK_WDT_TIMEOUT_S
|
|
int "Task watchdog timeout (seconds)"
|
|
depends on TASK_WDT
|
|
range 1 60
|
|
default 5
|
|
help
|
|
Timeout for the task WDT, in seconds.
|
|
|
|
config TASK_WDT_CHECK_IDLE_TASK
|
|
bool "Task watchdog watches CPU0 idle task"
|
|
depends on TASK_WDT
|
|
default y
|
|
help
|
|
With this turned on, the task WDT can detect if the idle task is not called within the task
|
|
watchdog timeout period. The idle task not being called usually is a symptom of another
|
|
task hoarding the CPU. It is also a bad thing because FreeRTOS household tasks depend on the
|
|
idle task getting some runtime every now and then. Take Care: With this disabled, this
|
|
watchdog will trigger if no tasks register themselves within the timeout value.
|
|
|
|
config TASK_WDT_CHECK_IDLE_TASK_CPU1
|
|
bool "Task watchdog also watches CPU1 idle task"
|
|
depends on TASK_WDT_CHECK_IDLE_TASK && !FREERTOS_UNICORE
|
|
default y
|
|
help
|
|
Also check the idle task that runs on CPU1.
|
|
|
|
#The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
|
|
#silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
|
|
config BROWNOUT_DET
|
|
bool "Hardware brownout detect & reset"
|
|
default y
|
|
depends on NEEDS_ESP32_NEW_SILICON_REV
|
|
help
|
|
The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
|
|
a specific value. If this happens, it will reset the chip in order to prevent unintended
|
|
behaviour.
|
|
|
|
choice BROWNOUT_DET_LVL_SEL
|
|
prompt "Brownout voltage level"
|
|
depends on BROWNOUT_DET
|
|
default BROWNOUT_DET_LVL_SEL_25
|
|
help
|
|
The brownout detector will reset the chip when the supply voltage is below this level.
|
|
|
|
#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
|
|
#of the brownout threshold levels.
|
|
config BROWNOUT_DET_LVL_SEL_0
|
|
bool "2.1V"
|
|
config BROWNOUT_DET_LVL_SEL_1
|
|
bool "2.2V"
|
|
config BROWNOUT_DET_LVL_SEL_2
|
|
bool "2.3V"
|
|
config BROWNOUT_DET_LVL_SEL_3
|
|
bool "2.4V"
|
|
config BROWNOUT_DET_LVL_SEL_4
|
|
bool "2.5V"
|
|
config BROWNOUT_DET_LVL_SEL_5
|
|
bool "2.6V"
|
|
config BROWNOUT_DET_LVL_SEL_6
|
|
bool "2.7V"
|
|
config BROWNOUT_DET_LVL_SEL_7
|
|
bool "2.8V"
|
|
endchoice
|
|
|
|
config BROWNOUT_DET_LVL
|
|
int
|
|
default 0 if BROWNOUT_DET_LVL_SEL_0
|
|
default 1 if BROWNOUT_DET_LVL_SEL_1
|
|
default 2 if BROWNOUT_DET_LVL_SEL_2
|
|
default 3 if BROWNOUT_DET_LVL_SEL_3
|
|
default 4 if BROWNOUT_DET_LVL_SEL_4
|
|
default 5 if BROWNOUT_DET_LVL_SEL_5
|
|
default 6 if BROWNOUT_DET_LVL_SEL_6
|
|
default 7 if BROWNOUT_DET_LVL_SEL_7
|
|
|
|
|
|
config BROWNOUT_DET_RESETDELAY
|
|
int "Brownout reset delay (in uS)"
|
|
depends on BROWNOUT_DET
|
|
range 0 6820
|
|
default 1000
|
|
help
|
|
The brownout detector can reset the chip after a certain delay, in order to make sure e.g. a voltage dip has entirely passed
|
|
before trying to restart the chip. You can set the delay here.
|
|
|
|
|
|
choice ESP32_TIME_SYSCALL
|
|
prompt "Timers used for gettimeofday function"
|
|
default ESP32_TIME_SYSCALL_USE_RTC_FRC1
|
|
help
|
|
This setting defines which hardware timers are used to
|
|
implement 'gettimeofday' and 'time' functions in C library.
|
|
|
|
- If only FRC1 timer is used, gettimeofday will provide time at
|
|
microsecond resolution. Time will not be preserved when going
|
|
into deep sleep mode.
|
|
- If both FRC1 and RTC timers are used, timekeeping will
|
|
continue in deep sleep. Time will be reported at 1 microsecond
|
|
resolution.
|
|
- If only RTC timer is used, timekeeping will continue in
|
|
deep sleep, but time will be measured at 6.(6) microsecond
|
|
resolution. Also the gettimeofday function itself may take
|
|
longer to run.
|
|
- If no timers are used, gettimeofday and time functions
|
|
return -1 and set errno to ENOSYS.
|
|
|
|
config ESP32_TIME_SYSCALL_USE_RTC
|
|
bool "RTC"
|
|
config ESP32_TIME_SYSCALL_USE_RTC_FRC1
|
|
bool "RTC and FRC1"
|
|
config ESP32_TIME_SYSCALL_USE_FRC1
|
|
bool "FRC1"
|
|
config ESP32_TIME_SYSCALL_USE_NONE
|
|
bool "None"
|
|
endchoice
|
|
|
|
choice ESP32_RTC_CLOCK_SOURCE
|
|
prompt "RTC clock source"
|
|
default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
|
|
help
|
|
Choose which clock is used as RTC clock source.
|
|
The only available option for now is to use internal
|
|
150kHz RC oscillator.
|
|
|
|
config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
|
|
bool "Internal RC"
|
|
config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
|
|
bool "External 32kHz crystal"
|
|
depends on DOCUMENTATION_FOR_RTC_CNTL
|
|
endchoice
|
|
|
|
|
|
config ESP32_PHY_AUTO_INIT
|
|
bool "Initialize PHY in startup code"
|
|
default y
|
|
help
|
|
If enabled, PHY will be initialized in startup code, before
|
|
app_main function runs.
|
|
If this is undesired, disable this option and call esp_phy_init
|
|
from the application before enabling WiFi or BT.
|
|
|
|
If this option is enabled, startup code will also initialize
|
|
NVS prior to initializing PHY.
|
|
|
|
If unsure, choose 'y'.
|
|
|
|
config ESP32_PHY_INIT_DATA_IN_PARTITION
|
|
bool "Use a partition to store PHY init data"
|
|
default n
|
|
help
|
|
If enabled, PHY init data will be loaded from a partition.
|
|
When using a custom partition table, make sure that PHY data
|
|
partition is included (type: 'data', subtype: 'phy').
|
|
With default partition tables, this is done automatically.
|
|
If PHY init data is stored in a partition, it has to be flashed there,
|
|
otherwise runtime error will occur.
|
|
|
|
If this option is not enabled, PHY init data will be embedded
|
|
into the application binary.
|
|
|
|
If unsure, choose 'n'.
|
|
|
|
config ESP32_PHY_MAX_TX_POWER
|
|
int "Max TX power (dBm)"
|
|
range 0 20
|
|
default 20
|
|
help
|
|
Set maximum transmit power. Actual transmit power for high
|
|
data rates may be lower than this setting.
|
|
|
|
endmenu
|