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126 lines
2.8 KiB
C
126 lines
2.8 KiB
C
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/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdbool.h>
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#include "hal/cache_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Cache init and cache hal context init
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*/
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void cache_hal_init(void);
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/**
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* @brief Disable cache
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*
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* Disable the ICache or DCache or both, all the items in the corresponding Cache(s) will be invalideated.
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* Next request to these items will trigger a transaction to the external memory (flash / psram)
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*
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* @note If the autoload feature is enabled, this API will return until the ICache autoload is disabled.
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*
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* @param type see `cache_type_t`
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*/
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void cache_hal_disable(cache_type_t type);
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/**
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* @brief Enable cache
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*
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* Enable the ICache or DCache or both.
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*
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* @param type see `cache_type_t`
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*/
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void cache_hal_enable(cache_type_t type);
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/**
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* @brief Suspend cache
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*
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* Suspend the ICache or DCache or both，suspends the CPU access to cache for a while, without invalidation.
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*
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* @param type see `cache_type_t`
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*
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* @return Current status of corresponding Cache(s)
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*/
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void cache_hal_suspend(cache_type_t type);
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/**
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* @brief Resume cache
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*
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* Resume the ICache or DCache or both.
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*
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* @param type see `cache_type_t`
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*/
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void cache_hal_resume(cache_type_t type);
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/**
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* @brief Check if corresponding cache is enabled or not
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*
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* @param type see `cache_type_t`
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*
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* @return true: enabled; false: disabled
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*/
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bool cache_hal_is_cache_enabled(cache_type_t type);
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/**
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* @brief Invalidate cache supported addr
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*
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* Invalidate a Cache item for either ICache or DCache.
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*
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* @param vaddr Start address of the region to be invalidated
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* @param size Size of the region to be invalidated
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*/
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void cache_hal_invalidate_addr(uint32_t vaddr, uint32_t size);
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#if SOC_CACHE_WRITEBACK_SUPPORTED
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/**
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* @brief Writeback cache supported addr
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*
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* Writeback the DCache item to external memory
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*
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* @param vaddr Start address of the region to writeback
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* @param size Size of the region to writeback
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*/
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void cache_hal_writeback_addr(uint32_t vaddr, uint32_t size);
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#endif //#if SOC_CACHE_WRITEBACK_SUPPORTED
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#if SOC_CACHE_FREEZE_SUPPORTED
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/**
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* @brief Freeze cache
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*
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* Freeze cache, CPU access to cache will be suspended, until the cache is unfrozen.
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*
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* @param type see `cache_type_t`
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*/
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void cache_hal_freeze(cache_type_t type);
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/**
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* @brief Unfreeze cache
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*
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* Unfreeze cache, CPU access to cache will be restored
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*
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* @param type see `cache_type_t`
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*/
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void cache_hal_unfreeze(cache_type_t type);
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#endif //#if SOC_CACHE_FREEZE_SUPPORTED
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/**
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* @brief Get cache line size, in bytes
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*
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* @param type see `cache_type_t`
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*
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* @return cache line size, in bytes
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*/
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uint32_t cache_hal_get_cache_line_size(cache_type_t type);
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#ifdef __cplusplus
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}
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#endif
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