mirror of
https://github.com/espressif/esp-idf.git
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224 lines
10 KiB
Plaintext
224 lines
10 KiB
Plaintext
menu "ESP32C3-Specific"
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visible if IDF_TARGET_ESP32C3
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choice ESP32C3_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
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default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
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help
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CPU frequency to be set on application startup.
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config ESP32C3_DEFAULT_CPU_FREQ_40
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bool "40 MHz"
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depends on IDF_ENV_FPGA
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config ESP32C3_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32C3_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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endchoice
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config ESP32C3_DEFAULT_CPU_FREQ_MHZ
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int
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default 40 if ESP32C3_DEFAULT_CPU_FREQ_40
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default 80 if ESP32C3_DEFAULT_CPU_FREQ_80
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default 160 if ESP32C3_DEFAULT_CPU_FREQ_160
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choice ESP32C3_UNIVERSAL_MAC_ADDRESSES
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bool "Number of universally administered (by IEEE) MAC address"
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default ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
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help
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Configure the number of universally administered (by IEEE) MAC addresses.
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During initialization, MAC addresses for each network interface are generated or derived from a
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single base MAC address.
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If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
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Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
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sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
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If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
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receive a universally administered MAC address. These are generated sequentially by adding 0
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and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
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receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
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addresses, respectively.
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When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
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a custom universal MAC address range, the correct setting will depend on the allocation of MAC
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addresses in this range (either 2 or 4 per device.)
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config ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
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bool "Two"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_BT
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config ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
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bool "Four"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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select ESP_MAC_ADDR_UNIVERSE_BT
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select ESP_MAC_ADDR_UNIVERSE_ETH
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endchoice
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config ESP32C3_UNIVERSAL_MAC_ADDRESSES
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int
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default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO
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default 4 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR
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config ESP32C3_DEBUG_OCDAWARE
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bool "Make exception and panic handlers JTAG/OCD aware"
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default y
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select FREERTOS_DEBUG_OCDAWARE
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help
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The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
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instead of panicking, have the debugger stop on the offending instruction.
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config ESP32C3_DEBUG_STUBS_ENABLE
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bool "OpenOCD debug stubs"
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default COMPILER_OPTIMIZATION_LEVEL_DEBUG
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depends on !ESP32C3_TRAX
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help
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Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
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e.g. GCOV data dump.
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config ESP32C3_BROWNOUT_DET
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bool "Hardware brownout detect & reset"
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default y
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help
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The ESP32-C3 has a built-in brownout detector which can detect if the voltage is lower than
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a specific value. If this happens, it will reset the chip in order to prevent unintended
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behaviour.
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choice ESP32C3_BROWNOUT_DET_LVL_SEL
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prompt "Brownout voltage level"
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depends on ESP32C3_BROWNOUT_DET
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default ESP32C3_BROWNOUT_DET_LVL_SEL_7
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help
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The brownout detector will reset the chip when the supply voltage is approximately
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below this level. Note that there may be some variation of brownout voltage level
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between each chip.
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#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
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#of the brownout threshold levels.
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config ESP32C3_BROWNOUT_DET_LVL_SEL_7
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bool "2.51V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_6
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bool "2.64V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_5
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bool "2.76V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_4
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bool "2.92V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_3
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bool "3.10V"
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config ESP32C3_BROWNOUT_DET_LVL_SEL_2
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bool "3.27V"
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endchoice
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config ESP32C3_BROWNOUT_DET_LVL
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int
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default 2 if ESP32C3_BROWNOUT_DET_LVL_SEL_2
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default 3 if ESP32C3_BROWNOUT_DET_LVL_SEL_3
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default 4 if ESP32C3_BROWNOUT_DET_LVL_SEL_4
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default 5 if ESP32C3_BROWNOUT_DET_LVL_SEL_5
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default 6 if ESP32C3_BROWNOUT_DET_LVL_SEL_6
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default 7 if ESP32C3_BROWNOUT_DET_LVL_SEL_7
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choice ESP32C3_TIME_SYSCALL
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prompt "Timers used for gettimeofday function"
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default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
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help
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This setting defines which hardware timers are used to
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implement 'gettimeofday' and 'time' functions in C library.
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- If both high-resolution (systimer) and RTC timers are used, timekeeping will
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continue in deep sleep. Time will be reported at 1 microsecond
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resolution. This is the default, and the recommended option.
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- If only high-resolution timer (systimer) is used, gettimeofday will
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provide time at microsecond resolution.
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Time will not be preserved when going into deep sleep mode.
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- If only RTC timer is used, timekeeping will continue in
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deep sleep, but time will be measured at 6.(6) microsecond
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resolution. Also the gettimeofday function itself may take
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longer to run.
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- If no timers are used, gettimeofday and time functions
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return -1 and set errno to ENOSYS.
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- When RTC is used for timekeeping, two RTC_STORE registers are
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used to keep time in deep sleep mode.
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config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER
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bool "RTC and high-resolution timer"
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select ESP_TIME_FUNCS_USE_RTC_TIMER
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select ESP_TIME_FUNCS_USE_ESP_TIMER
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config ESP32C3_TIME_SYSCALL_USE_RTC
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bool "RTC"
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select ESP_TIME_FUNCS_USE_RTC_TIMER
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config ESP32C3_TIME_SYSCALL_USE_SYSTIMER
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bool "High-resolution timer"
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select ESP_TIME_FUNCS_USE_ESP_TIMER
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config ESP32C3_TIME_SYSCALL_USE_NONE
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bool "None"
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select ESP_TIME_FUNCS_USE_NONE
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endchoice
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choice ESP32C3_RTC_CLK_SRC
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prompt "RTC clock source"
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default ESP32C3_RTC_CLK_SRC_INT_RC
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help
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Choose which clock is used as RTC clock source.
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config ESP32C3_RTC_CLK_SRC_INT_RC
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bool "Internal 150kHz RC oscillator"
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config ESP32C3_RTC_CLK_SRC_EXT_CRYS
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bool "External 32kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
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config ESP32C3_RTC_CLK_SRC_EXT_OSC
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bool "External 32kHz oscillator at 32K_XP pin"
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config ESP32C3_RTC_CLK_SRC_INT_8MD256
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bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
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endchoice
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config ESP32C3_RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256
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default 576 if ESP32C3_RTC_CLK_SRC_INT_RC
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range 0 125000
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform
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calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
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frequency. This option sets the number of RTC_SLOW_CLK cycles measured
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by the calibration routine. Higher numbers increase calibration
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precision, which may be important for applications which spend a lot of
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time in deep sleep. Lower numbers reduce startup time.
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When this option is set to 0, clock calibration will not be performed at
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startup, and approximate clock frequencies will be assumed:
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- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
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In case more value will help improve the definition of the launch of the crystal.
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If the crystal could not start, it will be switched to internal RC.
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config ESP32C3_NO_BLOBS
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bool "No Binary Blobs"
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depends on !BT_ENABLED
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default n
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help
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If enabled, this disables the linking of binary libraries in the application build. Note
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that after enabling this Wi-Fi/Bluetooth will not work.
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config ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
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bool "light sleep GPIO reset workaround"
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default y
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select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
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help
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ESP32C3 will reset at wake-up if GPIO is received a small electrostatic pulse during
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light sleep, with specific condition
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- GPIO needs to be configured as input-mode only
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- The pin receives a small electrostatic pulse, and reset occurs when the pulse
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voltage is higher than 6 V
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For GPIO set to input mode only, it is not a good practice to leave it open/floating,
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The hardware design needs to controlled it with determined supply or ground voltage
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is necessary.
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This option provides a software workaround for this issue. Configure to isolate all
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GPIO pins in sleep state.
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endmenu # ESP32C3-Specific
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