esp-idf/tools/test_apps/system/panic/main/include/test_panic.h
Alexey Lapshin 4df3ff619e feat(esp_system): implement hw stack guard for riscv chips
- add hardware stack guard based on assist-debug module
- enable hardware stack guard by default
- disable hardware stack guard for freertos ci.release test
- refactor rtos_int_enter/rtos_int_exit to change SP register inside them
- fix panic_reason.h header for RISC-V
- update docs to include information about the new feature
2023-07-01 16:27:40 +00:00

59 lines
1.0 KiB
C

/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/* Utility functions */
void die(const char* msg) __attribute__ ((noreturn));
/* Functions causing an exception/panic in different ways */
void test_abort(void);
void test_abort_cache_disabled(void);
void test_int_wdt(void);
void test_task_wdt_cpu0(void);
void test_hw_stack_guard_cpu0(void);
#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
void test_panic_extram_stack(void);
#endif
#if !CONFIG_FREERTOS_UNICORE
void test_task_wdt_cpu1(void);
void test_task_wdt_both_cpus(void);
#endif
void test_storeprohibited(void);
void test_cache_error(void);
void test_int_wdt_cache_disabled(void);
void test_stack_overflow(void);
void test_illegal_instruction(void);
void test_instr_fetch_prohibited(void);
void test_ub(void);
void test_assert(void);
void test_assert_cache_disabled(void);
#ifdef __cplusplus
}
#endif