mirror of
https://github.com/espressif/esp-idf.git
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135 lines
3.0 KiB
C
135 lines
3.0 KiB
C
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// The HAL layer for AES
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#include "hal/aes_hal.h"
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#include "hal/aes_ll.h"
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#include <stdlib.h>
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#include <string.h>
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#include "soc/soc_caps.h"
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uint8_t aes_hal_setkey(const uint8_t *key, size_t key_bytes, int mode)
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{
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aes_ll_set_mode(mode, key_bytes);
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uint8_t key_bytes_in_hardware = aes_ll_write_key(key, key_bytes / 4);
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/* Used for fault injection check: all words of key data should have been written to hardware */
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return key_bytes_in_hardware;
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}
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/**
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* @brief Busy wait until the AES accelerator is idle
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*
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*/
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static inline void aes_hal_wait_idle(void)
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{
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while (aes_ll_get_state() != ESP_AES_STATE_IDLE) {
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}
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}
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void aes_hal_transform_block(const void *input_block, void *output_block)
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{
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aes_ll_write_block(input_block);
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aes_ll_start_transform();
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aes_hal_wait_idle();
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aes_ll_read_block(output_block);
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}
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#if SOC_AES_SUPPORT_DMA
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void aes_hal_transform_dma_start(size_t num_blocks)
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{
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aes_ll_dma_enable(true);
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/* Write the number of blocks */
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aes_ll_set_num_blocks(num_blocks);
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/* Start encrypting/decrypting */
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aes_ll_start_transform();
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}
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void aes_hal_transform_dma_finish(void)
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{
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aes_ll_dma_exit();
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aes_ll_dma_enable(false);
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}
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void aes_hal_mode_init(esp_aes_mode_t mode)
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{
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/* Set the algorith mode CBC, CFB ... */
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aes_ll_set_block_mode(mode);
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/* Presently hard-coding the INC function to 32 bit */
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if (mode == ESP_AES_BLOCK_MODE_CTR) {
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aes_ll_set_inc();
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}
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}
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void aes_hal_set_iv(const uint8_t *iv)
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{
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aes_ll_set_iv(iv);
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}
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void aes_hal_read_iv(uint8_t *iv)
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{
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aes_ll_read_iv(iv);
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}
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void aes_hal_wait_done()
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{
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while (aes_ll_get_state() != ESP_AES_STATE_DONE) {}
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}
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#endif //SOC_AES_SUPPORT_DMA
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#if SOC_AES_SUPPORT_GCM
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void aes_hal_gcm_calc_hash(uint8_t *gcm_hash)
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{
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aes_ll_dma_enable(true);
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aes_ll_start_transform();
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aes_hal_wait_idle();
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aes_ll_gcm_read_hash(gcm_hash);
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}
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void aes_hal_transform_dma_gcm_start(size_t num_blocks)
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{
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/* Write the number of blocks */
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aes_ll_set_num_blocks(num_blocks);
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/* Start encrypting/decrypting */
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aes_ll_cont_transform();
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}
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void aes_hal_gcm_init(size_t aad_num_blocks, size_t num_valid_bit)
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{
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aes_ll_gcm_set_aad_num_blocks(aad_num_blocks);
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aes_ll_gcm_set_num_valid_bit(num_valid_bit);
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}
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void aes_hal_gcm_read_tag(uint8_t *tag, size_t tag_len)
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{
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uint8_t tag_res[TAG_BYTES];
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aes_ll_gcm_read_tag(tag_res);
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memcpy(tag, tag_res, tag_len);
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}
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#endif //SOC_AES_SUPPORT_GCM
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