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b2f390df01
The HAL readme was moved during refactoring, but links were not updated.
524 lines
13 KiB
C
524 lines
13 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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// The HAL layer for I2C
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#pragma once
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#include "hal/i2c_ll.h"
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#include "hal/i2c_types.h"
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/**
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* @brief I2C hal Context definition
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*/
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typedef struct {
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i2c_dev_t *dev;
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uint32_t version;
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} i2c_hal_context_t;
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/**
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* @brief Write the I2C rxfifo with the given length
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*
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* @param hal Context of the HAL layer
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* @param wr_data Pointer to data buffer
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* @param wr_size Amount of data needs write
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*
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* @return None
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*/
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#define i2c_hal_write_txfifo(hal,wr_data,wr_size) i2c_ll_write_txfifo((hal)->dev,wr_data,wr_size)
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/**
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* @brief Read the I2C rxfifo with the given length
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*
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* @param hal Context of the HAL layer
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* @param buf Pointer to data buffer
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* @param rd_size Amount of data needs read
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*
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* @return None
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*/
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#define i2c_hal_read_rxfifo(hal,buf,rd_size) i2c_ll_read_rxfifo((hal)->dev,buf,rd_size)
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/**
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* @brief Write I2C cmd register
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*
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* @param hal Context of the HAL layer
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* @param cmd I2C hardware command
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* @param cmd_idx The index of the command register, should be less than 16
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*
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* @return None
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*/
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#define i2c_hal_write_cmd_reg(hal,cmd, cmd_idx) i2c_ll_write_cmd_reg((hal)->dev,cmd,cmd_idx)
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/**
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* @brief Configure the I2C to triger a trasaction
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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#define i2c_hal_trans_start(hal) i2c_ll_trans_start((hal)->dev)
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/**
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* @brief Enable I2C master RX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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#define i2c_hal_enable_master_rx_it(hal) i2c_ll_master_enable_rx_it((hal)->dev)
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/**
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* @brief Enable I2C master TX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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#define i2c_hal_enable_master_tx_it(hal) i2c_ll_master_enable_tx_it((hal)->dev)
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/**
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* @brief Clear I2C slave TX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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#define i2c_hal_slave_clr_tx_it(hal) i2c_ll_slave_clr_tx_it((hal)->dev)
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/**
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* @brief Clear I2C slave RX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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#define i2c_hal_slave_clr_rx_it(hal) i2c_ll_slave_clr_rx_it((hal)->dev)
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/**
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* @brief Init the I2C master.
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*
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* @param hal Context of the HAL layer
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* @param i2c_num I2C port number
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*
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* @return None
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*/
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void i2c_hal_master_init(i2c_hal_context_t *hal, i2c_port_t i2c_num);
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/**
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* @brief Init the I2C slave.
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*
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* @param hal Context of the HAL layer
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* @param i2c_num I2C port number
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*
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* @return None
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*/
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void i2c_hal_slave_init(i2c_hal_context_t *hal, i2c_port_t i2c_num);
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/**
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* @brief Reset the I2C hw txfifo
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_txfifo_rst(i2c_hal_context_t *hal);
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/**
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* @brief Reset the I2C hw rxfifo
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_rxfifo_rst(i2c_hal_context_t *hal);
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/**
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* @brief Configure the I2C data MSB bit shifted first or LSB bit shifted first.
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*
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* @param hal Context of the HAL layer
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* @param tx_mode Data format of TX
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* @param rx_mode Data format of RX
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*
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* @return None
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*/
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void i2c_hal_set_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t tx_mode, i2c_trans_mode_t rx_mode);
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/**
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* @brief Configure the I2C hardware filter function.
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*
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* @param hal Context of the HAL layer
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* @param filter_num If the glitch period on the line is less than this value(in APB cycle), it will be filtered out
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* If `filter_num == 0`, the filter will be disabled
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*
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* @return None
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*/
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void i2c_hal_set_filter(i2c_hal_context_t *hal, uint8_t filter_num);
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/**
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* @brief Get the I2C hardware filter configuration
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*
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* @param hal Context of the HAL layer
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* @param filter_num Pointer to accept the hardware filter configuration
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*
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* @return None
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*/
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void i2c_hal_get_filter(i2c_hal_context_t *hal, uint8_t *filter_num);
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/**
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* @brief Configure the I2C SCL timing
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*
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* @param hal Context of the HAL layer
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* @param hight_period SCL high period
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* @param low_period SCL low period
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*
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* @return None
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*/
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void i2c_hal_set_scl_timing(i2c_hal_context_t *hal, int hight_period, int low_period);
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/**
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* @brief Configure the I2C master SCL frequency
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*
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* @param hal Context of the HAL layer
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* @param src_clk The I2C Source clock frequency
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* @param scl_freq The SCL frequency to be set
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*
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* @return None
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*/
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void i2c_hal_set_scl_freq(i2c_hal_context_t *hal, uint32_t src_clk, uint32_t scl_freq);
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/**
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* @brief Clear the I2C interrupt status with the given mask
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*
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* @param hal Context of the HAL layer
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* @param mask The interrupt bitmap needs to be clearned
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*
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* @return None
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*/
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void i2c_hal_clr_intsts_mask(i2c_hal_context_t *hal, uint32_t mask);
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/**
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* @brief Enable the I2C interrupt with the given mask
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*
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* @param hal Context of the HAL layer
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* @param mask The interrupt bitmap needs to be enabled
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*
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* @return None
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*/
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void i2c_hal_enable_intr_mask(i2c_hal_context_t *hal, uint32_t mask);
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/**
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* @brief Disable the I2C interrupt with the given mask
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*
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* @param hal Context of the HAL layer
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* @param mask The interrupt bitmap needs to be disabled
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*
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* @return None
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*/
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void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask);
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/**
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* @brief Configure the I2C memory access mode, FIFO mode or none FIFO mode
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*
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* @param hal Context of the HAL layer
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* @param fifo_mode_en Set true to enable FIFO access mode, else set it false
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*
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* @return None
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*/
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void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en);
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/**
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* @brief Configure the I2C timeout value
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*
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* @param hal Context of the HAL layer
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* @param tout_val the timeout value to be set
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*
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* @return None
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*/
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void i2c_hal_set_tout(i2c_hal_context_t *hal, int tout_val);
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/**
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* @brief Get the I2C time out configuration
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*
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* @param tout_val Pointer to accept the timeout configuration
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*
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* @return None
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*/
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void i2c_hal_get_tout(i2c_hal_context_t *hal, int *tout_val);
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/**
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* @brief Configure the I2C slave address
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*
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* @param hal Context of the HAL layer
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* @param slave_addr Slave address
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* @param addr_10bit_en Set true to enable 10-bit slave address mode, Set false to enable 7-bit address mode
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*
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* @return None
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*/
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void i2c_hal_set_slave_addr(i2c_hal_context_t *hal, uint16_t slave_addr, bool addr_10bit_en);
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/**
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* @brief Configure the I2C stop timing
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*
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* @param hal Context of the HAL layer
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* @param stop_setup The stop condition setup period (in APB cycle)
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* @param stop_hold The stop condition hold period (in APB cycle)
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*
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* @return None
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*/
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void i2c_hal_set_stop_timing(i2c_hal_context_t *hal, int stop_setup, int stop_hold);
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/**
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* @brief Configure the I2C start timing
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*
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* @param hal Context of the HAL layer
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* @param start_setup The start condition setup period (in APB cycle)
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* @param start_hold The start condition hold period (in APB cycle)
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*
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* @return None
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*/
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void i2c_hal_set_start_timing(i2c_hal_context_t *hal, int start_setup, int start_hold);
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/**
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* @brief Configure the I2C sda sample timing
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*
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* @param hal Context of the HAL layer
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* @param sda_sample The SDA sample time (in APB cycle)
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* @param sda_hold The SDA hold time (in APB cycle)
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*
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* @return None
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*/
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void i2c_hal_set_sda_timing(i2c_hal_context_t *hal, int sda_sample, int sda_hold);
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/**
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* @brief Configure the I2C txfifo empty threshold value
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*
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* @param hal Context of the HAL layer.
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* @param empty_thr TxFIFO empty threshold value
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*
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* @return None
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*/
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void i2c_hal_set_txfifo_empty_thr(i2c_hal_context_t *hal, uint8_t empty_thr);
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/**
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* @brief Configure the I2C rxfifo full threshold value
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*
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* @param hal Context of the HAL layer
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* @param full_thr RxFIFO full threshold value
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*
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* @return None
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*/
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void i2c_hal_set_rxfifo_full_thr(i2c_hal_context_t *hal, uint8_t full_thr);
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/**
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* @brief Get the I2C interrupt status
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*
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* @param hal Context of the HAL layer
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* @param mask Pointer to accept the interrupt status
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*
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* @return None
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*/
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void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask);
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/**
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* @brief Check if the I2C bus is busy
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*
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* @param hal Context of the HAL layer
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*
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* @return True if the bus is busy, otherwise, fale will be returned
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*/
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bool i2c_hal_is_bus_busy(i2c_hal_context_t *hal);
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/**
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* @brief Get the I2C sda sample timing configuration
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*
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* @param hal Context of the HAL layer
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* @param sample_time Pointer to accept the SDA sample time
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* @param hold_time Pointer to accept the SDA hold time
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*
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* @return None
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*/
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void i2c_hal_get_sda_timing(i2c_hal_context_t *hal, int *sample_time, int *hold_time);
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/**
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* @brief Get the I2C stop timing configuration
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*
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* @param hal Context of the HAL layer
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* @param setup_time Pointer to accept the stop condition setup period
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* @param hold_time Pointer to accept the stop condition hold period
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*
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* @return None
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*/
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void i2c_hal_get_stop_timing(i2c_hal_context_t *hal, int *setup_time, int *hold_time);
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/**
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* @brief Get the I2C scl timing configuration
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*
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* @param hal Context of the HAL layer
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* @param high_period Pointer to accept the scl high period
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* @param low_period Pointer to accept the scl low period
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*
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* @return None
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*/
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void i2c_hal_get_scl_timing(i2c_hal_context_t *hal, int *high_period, int *low_period);
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/**
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* @brief Get the I2C start timing configuration
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*
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* @param hal Context of the HAL layer
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* @param setup_time Pointer to accept the start condition setup period
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* @param hold_time Pointer to accept the start condition hold period
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*
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* @return None
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*/
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void i2c_hal_get_start_timing(i2c_hal_context_t *hal, int *setup_time, int *hold_time);
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/**
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* @brief Check if the I2C is master mode
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*
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* @param hal Context of the HAL layer
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*
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* @return True if in master mode, otherwise, false will be returned
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*/
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bool i2c_hal_is_master_mode(i2c_hal_context_t *hal);
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/**
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* @brief Get the rxFIFO readable length
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*
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* @param hal Context of the HAL layer
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* @param len Pointer to accept the rxFIFO readable length
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*
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* @return None
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*/
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void i2c_hal_get_rxfifo_cnt(i2c_hal_context_t *hal, uint32_t *len);
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/**
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* @brief Set I2C bus timing with the given frequency
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*
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* @param hal Context of the HAL layer
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* @param scl_freq The scl frequency to be set
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* @param src_clk Source clock of I2C
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*
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* @return None
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*/
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void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, uint32_t scl_freq, i2c_sclk_t src_clk);
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/**
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* @brief Get I2C txFIFO writeable length
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*
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* @param hal Context of the HAL layer
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* @param len Pointer to accept the txFIFO writeable length
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*
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* @return None
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*/
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void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len);
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/**
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* @brief Check if the I2C is master mode
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*
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* @param hal Context of the HAL layer
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* @param tx_mode Pointer to accept the TX data mode
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* @param rx_mode Pointer to accept the RX data mode
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*
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* @return None
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*/
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void i2c_hal_get_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t *tx_mode, i2c_trans_mode_t *rx_mode);
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/**
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* @brief I2C hardware FSM reset
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_master_fsm_rst(i2c_hal_context_t *hal);
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/**
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* @brief @brief Clear I2C bus
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_master_clr_bus(i2c_hal_context_t *hal);
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/**
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* @brief Enable I2C slave TX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_enable_slave_tx_it(i2c_hal_context_t *hal);
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/**
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* @brief Disable I2C slave TX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_disable_slave_tx_it(i2c_hal_context_t *hal);
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/**
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* @brief Enable I2C slave RX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_enable_slave_rx_it(i2c_hal_context_t *hal);
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/**
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* @brief Disable I2C slave RX interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void i2c_hal_disable_slave_rx_it(i2c_hal_context_t *hal);
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/**
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* @brief I2C master handle tx interrupt event
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*
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* @param hal Context of the HAL layer
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* @param event Pointer to accept the interrupt event
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*
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* @return None
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*/
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void i2c_hal_master_handle_tx_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
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/**
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* @brief I2C master handle rx interrupt event
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*
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* @param hal Context of the HAL layer
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* @param event Pointer to accept the interrupt event
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*
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* @return None
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*/
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void i2c_hal_master_handle_rx_event(i2c_hal_context_t *hal, i2c_intr_event_t *event);
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/**
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* @brief I2C slave handle interrupt event
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*
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* @param hal Context of the HAL layer
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* @param event Pointer to accept the interrupt event
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*
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* @return None
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*/
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void i2c_hal_slave_handle_event(i2c_hal_context_t *hal, i2c_intr_event_t *event); |