mirror of
https://github.com/espressif/esp-idf.git
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af7b21851e
Sincedd849ffc, _rodata_start label has been moved to a different linker output section from where the TLS templates (.tdata, .tbss) are located. Since link-time addresses of thread-local variables are calculated relative to the section start address, this resulted in incorrect calculation of THREADPTR/$tp registers. Fix by introducing new linker label, _flash_rodata_start, which points to the .flash.rodata output section where TLS variables are located, and use it when calculating THREADPTR/$tp. Also remove the hardcoded rodata section alignment for Xtensa targets. Alignment of rodata can be affected by the user application, which is the issuedd849ffcwas fixing. To accommodate any possible alignment, save it in a linker label (_flash_rodata_align) and then use when calculating THREADPTR. Note that this is not required on RISC-V, since this target doesn't use TPOFF.
476 lines
18 KiB
C
476 lines
18 KiB
C
/*
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FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*******************************************************************************
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// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining
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// a copy of this software and associated documentation files (the
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// "Software"), to deal in the Software without restriction, including
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// without limitation the rights to use, copy, modify, merge, publish,
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// distribute, sublicense, and/or sell copies of the Software, and to
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// permit persons to whom the Software is furnished to do so, subject to
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// the following conditions:
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//
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// The above copyright notice and this permission notice shall be included
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// in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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--------------------------------------------------------------------------------
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <xtensa/config/core.h>
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#include "xtensa_rtos.h"
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#include "soc/cpu.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "esp_debug_helpers.h"
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#include "esp_heap_caps.h"
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#include "esp_private/crosscore_int.h"
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#include "esp_intr_alloc.h"
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#include "esp_log.h"
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#include "sdkconfig.h"
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#include "esp_compiler.h"
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/* Defined in portasm.h */
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extern void _frxt_tick_timer_init(void);
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/* Defined in xtensa_context.S */
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extern void _xt_coproc_init(void);
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#if CONFIG_FREERTOS_CORETIMER_0
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER0_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#if CONFIG_FREERTOS_CORETIMER_1
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER1_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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_Static_assert(tskNO_AFFINITY == CONFIG_FREERTOS_NO_AFFINITY, "incorrect tskNO_AFFINITY value");
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/*-----------------------------------------------------------*/
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unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = {0}; // Duplicate of inaccessible xSchedulerRunning; needed at startup to avoid counting nesting
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unsigned port_interruptNesting[portNUM_PROCESSORS] = {0}; // Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit
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BaseType_t port_uxCriticalNesting[portNUM_PROCESSORS] = {0};
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BaseType_t port_uxOldInterruptState[portNUM_PROCESSORS] = {0};
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/*-----------------------------------------------------------*/
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// User exception dispatcher when exiting
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void _xt_user_exit(void);
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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// Wrapper to allow task functions to return (increases stack overhead by 16 bytes)
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static void vPortTaskWrapper(TaskFunction_t pxCode, void *pvParameters)
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{
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pxCode(pvParameters);
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//FreeRTOS tasks should not return. Log the task name and abort.
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char * pcTaskName = pcTaskGetTaskName(NULL);
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ESP_LOGE("FreeRTOS", "FreeRTOS Task \"%s\" should not return, Aborting now!", pcTaskName);
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abort();
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}
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#endif
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/*
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* Stack initialization
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*/
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#if portUSING_MPU_WRAPPERS
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged )
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#else
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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#endif
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{
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StackType_t *sp, *tp;
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XtExcFrame *frame;
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#if XCHAL_CP_NUM > 0
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uint32_t *p;
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#endif
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uint32_t *threadptr;
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void *task_thread_local_start;
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extern int _thread_local_start, _thread_local_end, _flash_rodata_start, _flash_rodata_align;
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// TODO: check that TLS area fits the stack
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uint32_t thread_local_sz = (uint8_t *)&_thread_local_end - (uint8_t *)&_thread_local_start;
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thread_local_sz = ALIGNUP(0x10, thread_local_sz);
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/* Initialize task's stack so that we have the following structure at the top:
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----LOW ADDRESSES ----------------------------------------HIGH ADDRESSES----------
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task stack | interrupt stack frame | thread local vars | co-processor save area |
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----------------------------------------------------------------------------------
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SP pxTopOfStack
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All parts are aligned to 16 byte boundary. */
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sp = (StackType_t *) (((UBaseType_t)(pxTopOfStack + 1) - XT_CP_SIZE - thread_local_sz - XT_STK_FRMSZ) & ~0xf);
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/* Clear the entire frame (do not use memset() because we don't depend on C library) */
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for (tp = sp; tp <= pxTopOfStack; ++tp)
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*tp = 0;
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frame = (XtExcFrame *) sp;
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/* Explicitly initialize certain saved registers */
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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frame->pc = (UBaseType_t) vPortTaskWrapper; /* task wrapper */
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#else
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frame->pc = (UBaseType_t) pxCode; /* task entrypoint */
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#endif
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frame->a0 = 0; /* to terminate GDB backtrace */
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frame->a1 = (UBaseType_t) sp + XT_STK_FRMSZ; /* physical top of stack frame */
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frame->exit = (UBaseType_t) _xt_user_exit; /* user exception exit dispatcher */
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/* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
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/* Also set entry point argument parameter. */
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#ifdef __XTENSA_CALL0_ABI__
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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frame->a2 = (UBaseType_t) pxCode;
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frame->a3 = (UBaseType_t) pvParameters;
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#else
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frame->a2 = (UBaseType_t) pvParameters;
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#endif
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frame->ps = PS_UM | PS_EXCM;
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#else
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/* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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frame->a6 = (UBaseType_t) pxCode;
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frame->a7 = (UBaseType_t) pvParameters;
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#else
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frame->a6 = (UBaseType_t) pvParameters;
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#endif
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frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
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#endif
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#ifdef XT_USE_SWPRI
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/* Set the initial virtual priority mask value to all 1's. */
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frame->vpri = 0xFFFFFFFF;
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#endif
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/* Init threadptr register and set up TLS run-time area.
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* The following diagram illustrates the layout of link-time and run-time
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* TLS sections.
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*
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* +-------------+
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* |Section: | Linker symbols:
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* |.flash.rodata| ---------------
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* 0x0+-------------+ <-- _flash_rodata_start
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* ^ | |
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* | | Other data |
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* | | ... |
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* | +-------------+ <-- _thread_local_start
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* | |.tbss | ^
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* v | | |
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* 0xNNNN|int example; | | (thread_local_size)
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* |.tdata | v
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* +-------------+ <-- _thread_local_end
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* | Other data |
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* | ... |
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* | |
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* +-------------+
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*
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* Local variables of
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* pxPortInitialiseStack
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* -----------------------
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* +-------------+ <-- pxTopOfStack
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* |.tdata (*) | ^
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* ^ |int example; | |(thread_local_size
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* | | | |
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* | |.tbss (*) | v
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* | +-------------+ <-- task_thread_local_start
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* 0xNNNN | | | ^
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* | | | |
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* | | | |_thread_local_start - _rodata_start
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* | | | |
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* | | | v
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* v +-------------+ <-- threadptr
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*
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* (*) The stack grows downward!
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*/
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task_thread_local_start = (void *)(((uint32_t)pxTopOfStack - XT_CP_SIZE - thread_local_sz) & ~0xf);
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memcpy(task_thread_local_start, &_thread_local_start, thread_local_sz);
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threadptr = (uint32_t *)(sp + XT_STK_EXTRA);
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/* Calculate THREADPTR value.
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* The generated code will add THREADPTR value to a constant value determined at link time,
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* to get the address of the TLS variable.
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* The constant value is calculated by the linker as follows
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* (search for 'tpoff' in elf32-xtensa.c in BFD):
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* offset = address - tls_section_vma + align_up(TCB_SIZE, tls_section_alignment)
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* where TCB_SIZE is hardcoded to 8.
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* Note this is slightly different compared to the RISC-V port, where offset = address - tls_section_vma.
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*/
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const uint32_t tls_section_alignment = (uint32_t) &_flash_rodata_align; /* ALIGN value of .flash.rodata section */
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const uint32_t tcb_size = 8; /* Unrelated to FreeRTOS, this is the constant from BFD */
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const uint32_t base = (tcb_size + tls_section_alignment - 1) & (~(tls_section_alignment - 1));
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*threadptr = (uint32_t)task_thread_local_start - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start) - base;
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#if XCHAL_CP_NUM > 0
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/* Init the coprocessor save area (see xtensa_context.h) */
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/* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
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* //p = (uint32_t *) xMPUSettings->coproc_area;
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*/
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p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);
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p[0] = 0;
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p[1] = 0;
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p[2] = (((uint32_t) p) + 12 + XCHAL_TOTAL_SA_ALIGN - 1) & -XCHAL_TOTAL_SA_ALIGN;
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#endif
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return sp;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the Xtensa port will get stopped. If required simply
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disable the tick interrupt here. */
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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// Interrupts are disabled at this point and stack contains PS with enabled interrupts when task context is restored
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#if XCHAL_CP_NUM > 0
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/* Initialize co-processor management for tasks. Leave CPENABLE alone. */
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_xt_coproc_init();
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#endif
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/* Init the tick divisor value */
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_xt_tick_divisor_init();
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/* Setup the hardware to generate the tick. */
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_frxt_tick_timer_init();
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port_xSchedulerRunning[xPortGetCoreID()] = 1;
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// Cannot be directly called from C; never returns
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__asm__ volatile ("call0 _frxt_dispatch\n");
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/* Should not get here. */
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return pdTRUE;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortSysTickHandler( void )
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{
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BaseType_t ret;
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portbenchmarkIntLatency();
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traceISR_ENTER(SYSTICK_INTR_ID);
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ret = xTaskIncrementTick();
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if( ret != pdFALSE )
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{
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portYIELD_FROM_ISR();
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} else {
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traceISR_EXIT();
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}
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return ret;
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}
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void vPortYieldOtherCore( BaseType_t coreid ) {
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esp_crosscore_int_send_yield( coreid );
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}
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/*-----------------------------------------------------------*/
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/*
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* Used to set coprocessor area in stack. Current hack is to reuse MPU pointer for coprocessor area.
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*/
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#if portUSING_MPU_WRAPPERS
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void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth )
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{
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#if XCHAL_CP_NUM > 0
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xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);
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/* NOTE: we cannot initialize the coprocessor save area here because FreeRTOS is going to
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* clear the stack area after we return. This is done in pxPortInitialiseStack().
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*/
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#endif
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}
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void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings )
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{
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/* If task has live floating point registers somewhere, release them */
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_xt_coproc_release( xMPUSettings->coproc_area );
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}
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#endif
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/*
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* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
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* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
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*/
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BaseType_t xPortInIsrContext(void)
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{
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unsigned int irqStatus;
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BaseType_t ret;
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irqStatus=portENTER_CRITICAL_NESTED();
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ret=(port_interruptNesting[xPortGetCoreID()] != 0);
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portEXIT_CRITICAL_NESTED(irqStatus);
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return ret;
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}
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/*
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* This function will be called in High prio ISRs. Returns true if the current core was in ISR context
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* before calling into high prio ISR context.
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*/
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BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
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{
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return (port_interruptNesting[xPortGetCoreID()] != 0);
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}
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void vPortAssertIfInISR(void)
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{
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configASSERT(xPortInIsrContext());
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}
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void vPortSetStackWatchpoint( void* pxStackStart ) {
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//Set watchpoint 1 to watch the last 32 bytes of the stack.
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//Unfortunately, the Xtensa watchpoints can't set a watchpoint on a random [base - base+n] region because
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//the size works by masking off the lowest address bits. For that reason, we futz a bit and watch the lowest 32
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//bytes of the stack we can actually watch. In general, this can cause the watchpoint to be triggered at most
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//28 bytes early. The value 32 is chosen because it's larger than the stack canary, which in FreeRTOS is 20 bytes.
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//This way, we make sure we trigger before/when the stack canary is corrupted, not after.
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int addr=(int)pxStackStart;
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addr=(addr+31)&(~31);
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esp_set_watchpoint(1, (char*)addr, 32, ESP_WATCHPOINT_STORE);
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}
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uint32_t xPortGetTickRateHz(void) {
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return (uint32_t)configTICK_RATE_HZ;
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}
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void __attribute__((optimize("-O3"))) vPortEnterCritical(portMUX_TYPE *mux)
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{
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BaseType_t oldInterruptLevel = portENTER_CRITICAL_NESTED();
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/* Interrupts may already be disabled (because we're doing this recursively)
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* but we can't get the interrupt level after
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* vPortCPUAquireMutex, because it also may mess with interrupts.
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* Get it here first, then later figure out if we're nesting
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* and save for real there.
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*/
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vPortCPUAcquireMutex( mux );
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BaseType_t coreID = xPortGetCoreID();
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BaseType_t newNesting = port_uxCriticalNesting[coreID] + 1;
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port_uxCriticalNesting[coreID] = newNesting;
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if( newNesting == 1 )
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{
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//This is the first time we get called. Save original interrupt level.
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port_uxOldInterruptState[coreID] = oldInterruptLevel;
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}
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}
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|
|
void __attribute__((optimize("-O3"))) vPortExitCritical(portMUX_TYPE *mux)
|
|
{
|
|
vPortCPUReleaseMutex( mux );
|
|
BaseType_t coreID = xPortGetCoreID();
|
|
BaseType_t nesting = port_uxCriticalNesting[coreID];
|
|
|
|
if(nesting > 0U)
|
|
{
|
|
nesting--;
|
|
port_uxCriticalNesting[coreID] = nesting;
|
|
|
|
if( nesting == 0U )
|
|
{
|
|
portEXIT_CRITICAL_NESTED(port_uxOldInterruptState[coreID]);
|
|
}
|
|
}
|
|
}
|
|
|
|
void __attribute__((weak)) vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
|
|
{
|
|
#define ERR_STR1 "***ERROR*** A stack overflow in task "
|
|
#define ERR_STR2 " has been detected."
|
|
const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
|
|
|
|
char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = { 0 };
|
|
|
|
char *dest = buf;
|
|
for (int i = 0 ; i < sizeof(str)/ sizeof(str[0]); i++) {
|
|
dest = strcat(dest, str[i]);
|
|
}
|
|
esp_system_abort(buf);
|
|
}
|