mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
f709faea7c
RTC_CNTL_COCPU_SHUT_RESET_EN register was being reset during ULP RISC-V initialization which does not let the ULP RISC-V coprocessor to reset after it goes to halt. For proper operation of the coprocessor, it must be reset after each cycle and hence this commit keeps RTC_CNTL_COCPU_SHUT_RESET_EN set. |
||
---|---|---|
.. | ||
cmake | ||
ld | ||
test | ||
ulp_common | ||
ulp_fsm | ||
ulp_riscv | ||
CMakeLists.txt | ||
component_ulp_common.cmake | ||
esp32ulp_mapgen.py | ||
Kconfig | ||
project_include.cmake | ||
sdkconfig.rename.esp32 | ||
sdkconfig.rename.esp32s2 | ||
toolchain_ulp_version.mk |