esp-idf/examples/system/ulp/ulp_riscv/interrupts/main/ulp
Sudeep Mohanty 4230acb971 feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts
This commit adds a new example which demonstrates how the ULP RISC-V
co-processor handles interrupts.
2024-01-18 15:59:49 +01:00
..
main.c feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts 2024-01-18 15:59:49 +01:00