esp-idf/components/soc/esp32/include
Ivan Grokhotkov a66df0826e soc: fix/update definitions related to FRC timers
1. BIT(8) of CTRL is actually read-only bit indicating interrupt status

2. BIT(0) or CTRL had inverted meaning: 1 is “level”, 0 is “edge”

3. Add definitions of prescaler values
2017-08-24 16:33:12 +08:00
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soc soc: fix/update definitions related to FRC timers 2017-08-24 16:33:12 +08:00