mirror of
https://github.com/espressif/esp-idf.git
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126 lines
3.7 KiB
C
126 lines
3.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include "esp_private/system_internal.h"
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#include "esp_private/rtc_ctrl.h"
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#include "esp_private/spi_flash_os.h"
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#include "esp_log.h"
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#include "esp_cpu.h"
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#include "soc/soc.h"
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#include "soc/rtc_periph.h"
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#include "esp_attr.h"
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#include "esp_rom_sys.h"
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#include "bootloader_flash.h"
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#include "esp_intr_alloc.h"
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#include "hal/brownout_hal.h"
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#include "hal/brownout_ll.h"
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#include "sdkconfig.h"
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#include "esp_rom_uart.h"
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#include "hal/uart_ll.h"
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#if defined(CONFIG_ESP_BROWNOUT_DET_LVL)
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#define BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
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#else
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#define BROWNOUT_DET_LVL 0
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#endif
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static __attribute__((unused)) DRAM_ATTR const char TAG[] = "BOD";
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#if CONFIG_ESP_SYSTEM_BROWNOUT_INTR
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IRAM_ATTR static void rtc_brownout_isr_handler(void *arg)
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{
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/* Normally RTC ISR clears the interrupt flag after the application-supplied
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* handler returns. Since restart is called here, the flag needs to be
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* cleared manually.
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*/
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brownout_ll_intr_clear();
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// Stop the other core.
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#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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const uint32_t core_id = esp_cpu_get_core_id();
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const uint32_t other_core_id = (core_id == 0) ? 1 : 0;
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esp_cpu_stall(other_core_id);
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#endif
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esp_reset_reason_set_hint(ESP_RST_BROWNOUT);
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#if CONFIG_SPI_FLASH_BROWNOUT_RESET
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if (spi_flash_brownout_need_reset()) {
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bootloader_flash_reset_chip();
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} else
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#endif // CONFIG_SPI_FLASH_BROWNOUT_RESET
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{
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ESP_DRAM_LOGI(TAG, "Brownout detector was triggered\r\n\r\n");
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}
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// Flush any data left in UART FIFOs
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for (int i = 0; i < SOC_UART_HP_NUM; ++i) {
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if (uart_ll_is_enabled(i)) {
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esp_rom_output_tx_wait_idle(i);
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}
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}
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esp_rom_software_reset_system();
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while (true) {
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;
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}
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}
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#endif // CONFIG_ESP_SYSTEM_BROWNOUT_INTR
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void esp_brownout_init(void)
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{
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#if CONFIG_ESP_SYSTEM_BROWNOUT_INTR
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brownout_hal_config_t cfg = {
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.threshold = BROWNOUT_DET_LVL,
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.enabled = true,
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.reset_enabled = false,
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.flash_power_down = true,
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.rf_power_down = true,
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};
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brownout_hal_config(&cfg);
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brownout_ll_intr_clear();
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#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61
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// TODO IDF-6606: LP_RTC_TIMER interrupt source is shared by lp_timer and brownout detector, but lp_timer interrupt
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// is not used now. An interrupt allocator is needed when lp_timer intr gets supported.
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esp_intr_alloc_intrstatus(ETS_LP_RTC_TIMER_INTR_SOURCE, ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_SHARED, (uint32_t)brownout_ll_intr_get_status_reg(), BROWNOUT_DETECTOR_LL_INTERRUPT_MASK, &rtc_brownout_isr_handler, NULL, NULL);
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#elif CONFIG_IDF_TARGET_ESP32P4
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esp_intr_alloc(ETS_LP_ANAPERI_INTR_SOURCE, ESP_INTR_FLAG_IRAM, &rtc_brownout_isr_handler, NULL, NULL);
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#else
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rtc_isr_register(rtc_brownout_isr_handler, NULL, RTC_CNTL_BROWN_OUT_INT_ENA_M, RTC_INTR_FLAG_IRAM);
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#endif
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brownout_ll_intr_enable(true);
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#else // brownout without interrupt
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brownout_hal_config_t cfg = {
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.threshold = BROWNOUT_DET_LVL,
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.enabled = true,
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.reset_enabled = true,
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.flash_power_down = true,
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.rf_power_down = true,
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};
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brownout_hal_config(&cfg);
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#endif
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}
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void esp_brownout_disable(void)
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{
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brownout_hal_config_t cfg = {
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.enabled = false,
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};
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brownout_hal_config(&cfg);
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#if CONFIG_ESP_SYSTEM_BROWNOUT_INTR
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brownout_ll_intr_enable(false);
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rtc_isr_deregister(rtc_brownout_isr_handler, NULL);
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#endif // CONFIG_ESP_SYSTEM_BROWNOUT_INTR
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}
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