esp-idf/components/freertos/FreeRTOS-Kernel/portable
Omar Chebib a8b1475fe7 feat(riscv): implement coprocessors save area and FPU support
This commit mainly targets the ESP32-P4. It adds supports for coprocessors on
RISC-V based targets. The coprocessor save area, describing the used coprocessors
is stored at the end of the stack of each task (highest address) whereas each
coprocessor save area is allocated at the beginning of the task (lowest address).
The context of each coprocessor is saved lazily, by the task that want to use it.
2023-10-23 11:10:28 +08:00
..
linux change(freertos/idf): Update version number, licenses, and sbom to v10.5.1 2023-10-21 04:39:16 +08:00
riscv feat(riscv): implement coprocessors save area and FPU support 2023-10-23 11:10:28 +08:00
xtensa change(freertos/idf): Update version number, licenses, and sbom to v10.5.1 2023-10-21 04:39:16 +08:00