mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
189 lines
8.2 KiB
C
189 lines
8.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "soc/system_periph_retention.h"
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#include "soc/uart_periph.h"
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#include "esp_sleep.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_private/startup_internal.h"
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#include "esp_private/sleep_retention.h"
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static __attribute__((unused)) const char *TAG = "sleep_sys_periph";
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static __attribute__((unused)) esp_err_t sleep_sys_periph_intr_matrix_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(intr_matrix_regs_retention, ARRAY_SIZE(intr_matrix_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_HIGH, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "Interrupt matrix");
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ESP_LOGD(TAG, "Interrupt Matrix sleep retention initialization");
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return ESP_OK;
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}
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static __attribute__((unused)) esp_err_t sleep_sys_periph_hp_system_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(hp_system_regs_retention, ARRAY_SIZE(hp_system_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_HIGH, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "HP system");
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ESP_LOGD(TAG, "HP System sleep retention initialization");
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return ESP_OK;
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}
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#if SOC_APM_SUPPORTED
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static __attribute__((unused)) esp_err_t sleep_sys_periph_tee_apm_retention_init(void *arg)
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{
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/* TBD for ESP32P4 IDF-10020. */
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#ifndef CONFIG_IDF_TARGET_ESP32P4
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esp_err_t err = sleep_retention_entries_create(tee_apm_regs_retention, ARRAY_SIZE(tee_apm_regs_retention), REGDMA_LINK_PRI_NON_CRITICAL_TEE_APM, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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if (err == ESP_OK) {
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err = sleep_retention_entries_create(tee_apm_highpri_regs_retention, ARRAY_SIZE(tee_apm_highpri_regs_retention), REGDMA_LINK_PRI_CRITICAL_TEE_APM, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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}
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "TEE/APM");
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ESP_LOGD(TAG, "TEE/APM sleep retention initialization");
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#endif
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return ESP_OK;
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}
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#endif
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#if CONFIG_ESP_CONSOLE_UART
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static __attribute__((unused)) esp_err_t sleep_sys_periph_stdout_console_uart_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(uart_reg_retention_info[CONFIG_ESP_CONSOLE_UART_NUM].regdma_entry_array,
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uart_reg_retention_info[CONFIG_ESP_CONSOLE_UART_NUM].array_size,
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REGDMA_LINK_PRI_SYS_PERIPH_HIGH, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "UART");
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ESP_LOGD(TAG, "stdout console UART sleep retention initialization");
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return ESP_OK;
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}
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#endif
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static __attribute__((unused)) esp_err_t sleep_sys_periph_iomux_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(iomux_regs_retention, ARRAY_SIZE(iomux_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_LOW, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "IO Matrix");
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ESP_LOGD(TAG, "IO Matrix sleep retention initialization");
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return ESP_OK;
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}
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static __attribute__((unused)) esp_err_t sleep_sys_periph_flash_spimem_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(flash_spimem_regs_retention, ARRAY_SIZE(flash_spimem_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_LOW, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "Flash SPI mem");
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ESP_LOGD(TAG, "Flash SPI Mem sleep retention initialization");
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return ESP_OK;
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}
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#if CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32P4
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/* TODO: PM-205, In the ESP32C5, Flash and PSRAM use the same set of SPIMEM hardware, while in P4, Flash and PSRAM each have their own SPIMEM hardware.
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* It’s necessary to confirm whether the ESP32C5 can independently manage SPIMEM retention for Flash and PSRAM in software. */
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static __attribute__((unused)) esp_err_t sleep_sys_periph_psram_spimem_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(psram_spimem_regs_retention, ARRAY_SIZE(psram_spimem_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_LOW, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "PSRAM SPI mem");
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ESP_LOGD(TAG, "PSRAM SPI Mem sleep retention initialization");
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return ESP_OK;
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}
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#endif
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static __attribute__((unused)) esp_err_t sleep_sys_periph_systimer_retention_init(void *arg)
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{
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esp_err_t err = sleep_retention_entries_create(systimer_regs_retention, ARRAY_SIZE(systimer_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_LOW, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (%s) retention", "SysTimer");
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ESP_LOGD(TAG, "SysTimer sleep retention initialization");
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return ESP_OK;
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}
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#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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esp_err_t sleep_sys_periph_l2_cache_retention_init(void)
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{
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esp_err_t err = sleep_retention_entries_create(l2_cache_regs_retention, ARRAY_SIZE(l2_cache_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_HIGH, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for digital peripherals (L2 Cache) retention");
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ESP_LOGI(TAG, "L2 Cache sleep retention initialization");
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return ESP_OK;
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}
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#endif
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#if SOC_PAU_IN_TOP_DOMAIN
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esp_err_t sleep_pau_retention_init(void)
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{
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esp_err_t err = sleep_retention_entries_create(pau_regs_retention, ARRAY_SIZE(pau_regs_retention), REGDMA_LINK_PRI_SYS_PERIPH_LOW, SLEEP_RETENTION_MODULE_SYS_PERIPH);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for system (PAU) retention");
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ESP_LOGI(TAG, "PAU sleep retention initialization");
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return ESP_OK;
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}
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#endif
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static __attribute__((unused)) esp_err_t sleep_sys_periph_retention_init(void *arg)
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{
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esp_err_t err;
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err = sleep_sys_periph_intr_matrix_retention_init(arg);
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if(err) goto error;
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err = sleep_sys_periph_hp_system_retention_init(arg);
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if(err) goto error;
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#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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err = sleep_sys_periph_l2_cache_retention_init();
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if(err) goto error;
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#endif
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#if SOC_APM_SUPPORTED
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err = sleep_sys_periph_tee_apm_retention_init(arg);
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if(err) goto error;
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#endif
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#if CONFIG_ESP_CONSOLE_UART
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err = sleep_sys_periph_stdout_console_uart_retention_init(arg);
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if(err) goto error;
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#endif
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err = sleep_sys_periph_iomux_retention_init(arg);
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if(err) goto error;
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err = sleep_sys_periph_flash_spimem_retention_init(arg);
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if(err) goto error;
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#if CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32P4
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err = sleep_sys_periph_psram_spimem_retention_init(arg);
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if(err) goto error;
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#endif
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err = sleep_sys_periph_systimer_retention_init(arg);
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if(err) goto error;
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#if SOC_PAU_IN_TOP_DOMAIN
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err = sleep_pau_retention_init();
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#endif
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error:
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return err;
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}
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bool peripheral_domain_pd_allowed(void)
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{
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
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const uint32_t inited_modules = sleep_retention_get_inited_modules();
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const uint32_t created_modules = sleep_retention_get_created_modules();
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return (((inited_modules ^ created_modules) & TOP_DOMAIN_PERIPHERALS_BM) == 0);
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#else
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return false;
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#endif
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}
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
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ESP_SYSTEM_INIT_FN(sleep_sys_periph_startup_init, SECONDARY, BIT(0), 107)
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{
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sleep_retention_module_init_param_t init_param = {
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.cbs = { .create = { .handle = sleep_sys_periph_retention_init, .arg = NULL } },
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.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
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};
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esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_SYS_PERIPH, &init_param);
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if (err == ESP_OK) {
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err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_SYS_PERIPH);
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if (err != ESP_OK) {
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ESP_LOGW(TAG, "failed to allocate sleep retention linked list for system peripherals retention");
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}
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}
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return ESP_OK;
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}
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#endif
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