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Configurable option to use IRAM as byte accessible memory (in single core mode) using load-store (non-word aligned and non-word size IRAM access specific) exception handlers. This allows to use IRAM for use-cases where certain performance penalty (upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration option has been provided to redirect mbedTLS specific in-out content length buffers to IRAM (in single core mode), allows to save 20KB per TLS connection.
6 lines
206 B
Plaintext
6 lines
206 B
Plaintext
TEST_COMPONENTS=freertos esp32 esp_timer driver heap pthread soc spi_flash vfs
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CONFIG_MEMMAP_SMP=n
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CONFIG_FREERTOS_UNICORE=y
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CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY=y
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CONFIG_ESP32_RTCDATA_IN_FAST_MEM=y
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