mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
7638235311
In esp32p4, the MCPWM has a new feature, mainly ETM-oriented. Each operator has two event comparators, can generate an event when the count value of the timer that operator connects is equal to the value of event comparator.
389 lines
16 KiB
C
389 lines
16 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdarg.h>
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#include <sys/cdefs.h>
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#include "sdkconfig.h"
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_memory_utils.h"
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#include "soc/soc_caps.h"
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#include "soc/mcpwm_periph.h"
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#include "hal/mcpwm_ll.h"
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#include "driver/mcpwm_timer.h"
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#include "esp_private/mcpwm.h"
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#include "mcpwm_private.h"
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static const char *TAG = "mcpwm";
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static void mcpwm_timer_default_isr(void *args);
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static esp_err_t mcpwm_timer_register_to_group(mcpwm_timer_t *timer, int group_id)
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{
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mcpwm_group_t *group = mcpwm_acquire_group_handle(group_id);
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ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", group_id);
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int timer_id = -1;
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portENTER_CRITICAL(&group->spinlock);
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for (int i = 0; i < SOC_MCPWM_TIMERS_PER_GROUP; i++) {
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if (!group->timers[i]) {
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timer_id = i;
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group->timers[i] = timer;
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break;
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}
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}
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portEXIT_CRITICAL(&group->spinlock);
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if (timer_id < 0) {
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mcpwm_release_group_handle(group);
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group = NULL;
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} else {
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timer->group = group;
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timer->timer_id = timer_id;
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}
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ESP_RETURN_ON_FALSE(timer_id >= 0, ESP_ERR_NOT_FOUND, TAG, "no free timer in group (%d)", group_id);
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return ESP_OK;
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}
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static void mcpwm_timer_unregister_from_group(mcpwm_timer_t *timer)
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{
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mcpwm_group_t *group = timer->group;
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int timer_id = timer->timer_id;
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portENTER_CRITICAL(&group->spinlock);
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group->timers[timer_id] = NULL;
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portEXIT_CRITICAL(&group->spinlock);
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// timer has a reference on group, release it now
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mcpwm_release_group_handle(group);
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}
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static esp_err_t mcpwm_timer_destroy(mcpwm_timer_t *timer)
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{
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if (timer->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_free(timer->intr), TAG, "uninstall interrupt service failed");
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}
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if (timer->group) {
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mcpwm_timer_unregister_from_group(timer);
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}
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free(timer);
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return ESP_OK;
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}
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esp_err_t mcpwm_new_timer(const mcpwm_timer_config_t *config, mcpwm_timer_handle_t *ret_timer)
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{
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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mcpwm_timer_t *timer = NULL;
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ESP_GOTO_ON_FALSE(config && ret_timer, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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ESP_GOTO_ON_FALSE(config->group_id < SOC_MCPWM_GROUPS && config->group_id >= 0, ESP_ERR_INVALID_ARG,
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err, TAG, "invalid group ID:%d", config->group_id);
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if (config->intr_priority) {
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ESP_GOTO_ON_FALSE(1 << (config->intr_priority) & MCPWM_ALLOW_INTR_PRIORITY_MASK, ESP_ERR_INVALID_ARG, err,
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TAG, "invalid interrupt priority:%d", config->intr_priority);
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}
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timer = heap_caps_calloc(1, sizeof(mcpwm_timer_t), MCPWM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(timer, ESP_ERR_NO_MEM, err, TAG, "no mem for timer");
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ESP_GOTO_ON_ERROR(mcpwm_timer_register_to_group(timer, config->group_id), err, TAG, "register timer failed");
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mcpwm_group_t *group = timer->group;
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int group_id = group->group_id;
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mcpwm_hal_context_t *hal = &group->hal;
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int timer_id = timer->timer_id;
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// if interrupt priority specified before, it cannot be changed until the group is released
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// check if the new priority specified consistents with the old one
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ESP_GOTO_ON_ERROR(mcpwm_check_intr_priority(group, config->intr_priority), err, TAG, "set group intrrupt priority failed");
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// select the clock source
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mcpwm_timer_clock_source_t clk_src = config->clk_src ? config->clk_src : MCPWM_TIMER_CLK_SRC_DEFAULT;
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ESP_GOTO_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)clk_src), err, TAG, "set group clock failed");
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// reset the timer to a determined state
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mcpwm_hal_timer_reset(hal, timer_id);
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// set timer resolution
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uint32_t prescale = 0;
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ESP_GOTO_ON_ERROR(mcpwm_set_prescale(group, config->resolution_hz, MCPWM_LL_MAX_TIMER_PRESCALE, &prescale), err, TAG, "set prescale failed");
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mcpwm_ll_timer_set_clock_prescale(hal->dev, timer_id, prescale);
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timer->resolution_hz = group->resolution_hz / prescale;
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if (timer->resolution_hz != config->resolution_hz) {
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ESP_LOGW(TAG, "adjust timer resolution to %"PRIu32"Hz", timer->resolution_hz);
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}
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// set the peak tickes that the timer can reach to
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timer->count_mode = config->count_mode;
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uint32_t peak_ticks = config->period_ticks;
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if (timer->count_mode == MCPWM_TIMER_COUNT_MODE_UP_DOWN) {
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peak_ticks /= 2; // in symmetric mode, peak_ticks = period_ticks / 2
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}
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timer->peak_ticks = peak_ticks;
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mcpwm_ll_timer_set_peak(hal->dev, timer_id, peak_ticks, timer->count_mode == MCPWM_TIMER_COUNT_MODE_UP_DOWN);
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// set count direction
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mcpwm_ll_timer_set_count_mode(hal->dev, timer_id, timer->count_mode);
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// what time is allowed to update the period
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mcpwm_ll_timer_enable_update_period_on_sync(hal->dev, timer_id, config->flags.update_period_on_sync);
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mcpwm_ll_timer_enable_update_period_on_tez(hal->dev, timer_id, config->flags.update_period_on_empty);
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// fill in other timer specific members
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timer->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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timer->fsm = MCPWM_TIMER_FSM_INIT;
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*ret_timer = timer;
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ESP_LOGD(TAG, "new timer(%d,%d) at %p, resolution:%"PRIu32"Hz, peak:%"PRIu32", count_mod:%c",
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group_id, timer_id, timer, timer->resolution_hz, timer->peak_ticks, "SUDB"[timer->count_mode]);
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return ESP_OK;
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err:
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if (timer) {
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mcpwm_timer_destroy(timer);
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}
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return ret;
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}
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esp_err_t mcpwm_del_timer(mcpwm_timer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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// check child resources are in free state
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ESP_RETURN_ON_FALSE(!timer->sync_src, ESP_ERR_INVALID_STATE, TAG, "timer sync_src still in working");
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ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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mcpwm_group_t *group = timer->group;
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int timer_id = timer->timer_id;
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mcpwm_hal_context_t *hal = &group->hal;
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// disable and clear the pending interrupt
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_TIMER_MASK(timer_id), false);
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mcpwm_ll_intr_clear_status(hal->dev, MCPWM_LL_EVENT_TIMER_MASK(timer_id));
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portEXIT_CRITICAL(&group->spinlock);
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ESP_LOGD(TAG, "del timer (%d,%d)", group->group_id, timer_id);
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// recycle memory resource
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ESP_RETURN_ON_ERROR(mcpwm_timer_destroy(timer), TAG, "destroy timer failed");
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return ESP_OK;
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}
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esp_err_t mcpwm_timer_register_event_callbacks(mcpwm_timer_handle_t timer, const mcpwm_timer_event_callbacks_t *cbs, void *user_data)
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{
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ESP_RETURN_ON_FALSE(timer && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = timer->group;
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int group_id = group->group_id;
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int timer_id = timer->timer_id;
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mcpwm_hal_context_t *hal = &group->hal;
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#if CONFIG_MCPWM_ISR_IRAM_SAFE
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if (cbs->on_empty) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_empty), ESP_ERR_INVALID_ARG, TAG, "on_empty callback not in IRAM");
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}
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if (cbs->on_full) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_full), ESP_ERR_INVALID_ARG, TAG, "on_full callback not in IRAM");
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}
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if (cbs->on_stop) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_stop), ESP_ERR_INVALID_ARG, TAG, "on_stop callback not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
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}
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#endif
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// lazy install interrupt service
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if (!timer->intr) {
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ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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int isr_flags = MCPWM_INTR_ALLOC_FLAG;
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isr_flags |= mcpwm_get_intr_priority_flag(group);
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ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(mcpwm_periph_signals.groups[group_id].irq_id, isr_flags,
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(uint32_t)mcpwm_ll_intr_get_status_reg(hal->dev), MCPWM_LL_EVENT_TIMER_MASK(timer_id),
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mcpwm_timer_default_isr, timer, &timer->intr), TAG, "install interrupt service for timer failed");
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}
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// enable/disable interrupt events
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_TIMER_FULL(timer_id), cbs->on_full != NULL);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_TIMER_EMPTY(timer_id), cbs->on_empty != NULL);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_TIMER_STOP(timer_id), cbs->on_stop != NULL);
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portEXIT_CRITICAL(&group->spinlock);
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timer->on_stop = cbs->on_stop;
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timer->on_full = cbs->on_full;
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timer->on_empty = cbs->on_empty;
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timer->user_data = user_data;
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return ESP_OK;
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}
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esp_err_t mcpwm_timer_get_phase(mcpwm_timer_handle_t timer, uint32_t *count_value, mcpwm_timer_direction_t *direction)
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{
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ESP_RETURN_ON_FALSE(timer && count_value && direction, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = timer->group;
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int timer_id = timer->timer_id;
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mcpwm_hal_context_t *hal = &group->hal;
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portENTER_CRITICAL(&timer->spinlock);
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*count_value = mcpwm_ll_timer_get_count_value(hal->dev, timer_id);
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*direction = mcpwm_ll_timer_get_count_direction(hal->dev, timer_id);
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portEXIT_CRITICAL(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t mcpwm_timer_enable(mcpwm_timer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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mcpwm_group_t *group = timer->group;
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if (timer->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_enable(timer->intr), TAG, "enable interrupt failed");
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}
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if (group->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(group->pm_lock), TAG, "acquire pm lock failed");
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}
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timer->fsm = MCPWM_TIMER_FSM_ENABLE;
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return ESP_OK;
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}
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esp_err_t mcpwm_timer_disable(mcpwm_timer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not in enable state");
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mcpwm_group_t *group = timer->group;
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if (timer->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_disable(timer->intr), TAG, "disable interrupt failed");
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}
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if (group->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_release(group->pm_lock), TAG, "acquire pm lock failed");
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}
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timer->fsm = MCPWM_TIMER_FSM_INIT;
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return ESP_OK;
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}
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esp_err_t mcpwm_timer_start_stop(mcpwm_timer_handle_t timer, mcpwm_timer_start_stop_cmd_t command)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not in enable state");
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mcpwm_group_t *group = timer->group;
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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mcpwm_ll_timer_set_start_stop_command(group->hal.dev, timer->timer_id, command);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t mcpwm_timer_set_phase_on_sync(mcpwm_timer_handle_t timer, const mcpwm_timer_sync_phase_config_t *config)
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{
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ESP_RETURN_ON_FALSE(timer && config, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = timer->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int group_id = group->group_id;
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int timer_id = timer->timer_id;
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mcpwm_sync_handle_t sync_source = config->sync_src;
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// check if the sync direction is valid
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bool valid_direction = true;
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if (timer->count_mode == MCPWM_TIMER_COUNT_MODE_UP) {
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valid_direction = config->direction == MCPWM_TIMER_DIRECTION_UP;
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} else if (timer->count_mode == MCPWM_TIMER_COUNT_MODE_DOWN) {
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valid_direction = config->direction == MCPWM_TIMER_DIRECTION_DOWN;
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} else if (timer->count_mode == MCPWM_TIMER_COUNT_MODE_PAUSE) {
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valid_direction = false;
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} else {
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valid_direction = true;
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}
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ESP_RETURN_ON_FALSE(valid_direction, ESP_ERR_INVALID_ARG, TAG, "invalid sync direction");
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// enable sync feature and set sync phase
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if (sync_source) {
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ESP_RETURN_ON_FALSE(config->count_value < MCPWM_LL_MAX_COUNT_VALUE, ESP_ERR_INVALID_ARG, TAG, "invalid sync count value");
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switch (sync_source->type) {
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case MCPWM_SYNC_TYPE_TIMER: {
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ESP_RETURN_ON_FALSE(group == sync_source->group, ESP_ERR_INVALID_ARG, TAG, "timer and sync source are not in the same group");
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mcpwm_timer_sync_src_t *timer_sync_src = __containerof(sync_source, mcpwm_timer_sync_src_t, base);
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mcpwm_ll_timer_set_timer_sync_input(hal->dev, timer_id, timer_sync_src->timer->timer_id);
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ESP_LOGD(TAG, "enable sync to timer (%d,%d) for timer (%d,%d)",
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group_id, timer_sync_src->timer->timer_id, group_id, timer_id);
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break;
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}
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case MCPWM_SYNC_TYPE_GPIO: {
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ESP_RETURN_ON_FALSE(group == sync_source->group, ESP_ERR_INVALID_ARG, TAG, "timer and sync source are not in the same group");
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mcpwm_gpio_sync_src_t *gpio_sync_src = __containerof(sync_source, mcpwm_gpio_sync_src_t, base);
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mcpwm_ll_timer_set_gpio_sync_input(hal->dev, timer_id, gpio_sync_src->sync_id);
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ESP_LOGD(TAG, "enable sync to gpio (%d) for timer (%d,%d)",
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gpio_sync_src->gpio_num, group_id, timer_id);
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break;
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}
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case MCPWM_SYNC_TYPE_SOFT: {
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mcpwm_soft_sync_src_t *soft_sync = __containerof(sync_source, mcpwm_soft_sync_src_t, base);
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if (soft_sync->soft_sync_from == MCPWM_SOFT_SYNC_FROM_TIMER && soft_sync->timer != timer) {
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ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_STATE, TAG, "soft sync already used by another timer");
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}
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soft_sync->soft_sync_from = MCPWM_SOFT_SYNC_FROM_TIMER;
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soft_sync->timer = timer;
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soft_sync->base.group = group;
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break;
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}
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}
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mcpwm_ll_timer_set_sync_phase_direction(hal->dev, timer_id, config->direction);
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mcpwm_ll_timer_set_sync_phase_value(hal->dev, timer_id, config->count_value);
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mcpwm_ll_timer_enable_sync_input(hal->dev, timer_id, true);
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} else { // disable sync feature
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mcpwm_ll_timer_enable_sync_input(hal->dev, timer_id, false);
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ESP_LOGD(TAG, "disable sync for timer (%d,%d)", group_id, timer_id);
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}
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return ESP_OK;
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}
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static void IRAM_ATTR mcpwm_timer_default_isr(void *args)
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{
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mcpwm_timer_t *timer = (mcpwm_timer_t *)args;
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mcpwm_group_t *group = timer->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int timer_id = timer->timer_id;
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bool need_yield = false;
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uint32_t status = mcpwm_ll_intr_get_status(hal->dev);
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mcpwm_ll_intr_clear_status(hal->dev, status & MCPWM_LL_EVENT_TIMER_MASK(timer_id));
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mcpwm_timer_event_data_t edata = {
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.direction = mcpwm_ll_timer_get_count_direction(hal->dev, timer_id),
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.count_value = mcpwm_ll_timer_get_count_value(hal->dev, timer_id),
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};
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if (status & MCPWM_LL_EVENT_TIMER_STOP(timer_id)) {
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mcpwm_timer_event_cb_t cb = timer->on_stop;
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if (cb) {
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if (cb(timer, &edata, timer->user_data)) {
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need_yield = true;
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}
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}
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}
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if (status & MCPWM_LL_EVENT_TIMER_FULL(timer_id)) {
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mcpwm_timer_event_cb_t cb = timer->on_full;
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if (cb) {
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if (cb(timer, &edata, timer->user_data)) {
|
|
need_yield = true;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (status & MCPWM_LL_EVENT_TIMER_EMPTY(timer_id)) {
|
|
mcpwm_timer_event_cb_t cb = timer->on_empty;
|
|
if (cb) {
|
|
if (cb(timer, &edata, timer->user_data)) {
|
|
need_yield = true;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (need_yield) {
|
|
portYIELD_FROM_ISR();
|
|
}
|
|
}
|